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authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2020-11-26 11:57:04 +0300
committerMiquel Raynal <miquel.raynal@bootlin.com>2020-12-11 00:37:33 +0300
commitce22be4307b801b4e24773c6290dd913b751d436 (patch)
treef077c88f3f350393f63429cbd45c807322a81935 /Documentation/devicetree/bindings/mtd
parent5e214b2554f8b8e44eed62f62196406cbfe3caa8 (diff)
downloadlinux-ce22be4307b801b4e24773c6290dd913b751d436.tar.xz
dt-bindings: qcom_nandc: Add SDX55 QPIC NAND documentation
Qualcomm SDX55 uses QPIC NAND controller version 2.0.0 with BAM DMA Engine. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Diffstat (limited to 'Documentation/devicetree/bindings/mtd')
-rw-r--r--Documentation/devicetree/bindings/mtd/qcom_nandc.txt2
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
index 5bdcd9990a94..5647913d8837 100644
--- a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
+++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
@@ -10,6 +10,8 @@ Required properties:
IPQ6018 SoC and it uses BAM DMA
* "qcom,ipq8074-nand" - for QPIC NAND controller v1.5.0 being used in
IPQ8074 SoC and it uses BAM DMA
+ * "qcom,sdx55-nand" - for QPIC NAND controller v2.0.0 being used in
+ SDX55 SoC and it uses BAM DMA
- reg: MMIO address range
- clocks: must contain core clock and always on clock