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| author | Mischa Jonker <Mischa.Jonker@synopsys.com> | 2019-07-24 15:04:35 +0300 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2019-08-26 20:05:25 +0300 |
| commit | 01449985e644329e1fd5c269fff07b9a539eeebf (patch) | |
| tree | 38e2017370a1ff3e8142d29bd48a5b3ffea051ca /Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt | |
| parent | 174ae4e96e0f54958cbe3fd3090a3cefeb63af4d (diff) | |
| download | linux-01449985e644329e1fd5c269fff07b9a539eeebf.tar.xz | |
dt-bindings: IDU-intc: Clean up documentation
* Some lines exceeded 80 characters.
* Clarified statement about AUX register interface
Signed-off-by: Mischa Jonker <mischa.jonker@synopsys.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt')
| -rw-r--r-- | Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt index 09fc02b99845..c5a1c7b4fc3f 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,archs-idu-intc.txt @@ -1,7 +1,8 @@ * ARC-HS Interrupt Distribution Unit - This optional 2nd level interrupt controller can be used in SMP configurations for - dynamic IRQ routing, load balancing of common/external IRQs towards core intc. + This optional 2nd level interrupt controller can be used in SMP configurations + for dynamic IRQ routing, load balancing of common/external IRQs towards core + intc. Properties: @@ -13,8 +14,8 @@ Properties: of the particular interrupt line of IDU corresponds to the line N+24 of the core interrupt controller. - intc accessed via the special ARC AUX register interface, hence "reg" property - is not specified. + The interrupt controller is accessed via the special ARC AUX register + interface, hence "reg" property is not specified. Example: core_intc: core-interrupt-controller { |