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authorManivannan Sadhasivam <manivannan.sadhasivam@linaro.org>2018-12-10 20:35:39 +0300
committerMarc Zyngier <marc.zyngier@arm.com>2018-12-13 12:35:56 +0300
commitcdf6179630a5aa877fba986e1c5dc91f2285eb08 (patch)
tree3f71f232583f2edc8d55173647b64cc8ba69e9f3 /Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt
parentf9c75bca44d4754456cba7d3b4f0e15518177b0e (diff)
downloadlinux-cdf6179630a5aa877fba986e1c5dc91f2285eb08.tar.xz
dt-bindings: interrupt-controller: Document RDA8810PL intc
Document interrupt controller in RDA Micro RDA8810PL SoC. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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+RDA Micro RDA8810PL Interrupt Controller
+
+The interrupt controller in RDA8810PL SoC is a custom interrupt controller
+which supports up to 32 interrupts.
+
+Required properties:
+
+- compatible: Should be "rda,8810pl-intc".
+- reg: Specifies base physical address of the registers set.
+- interrupt-controller: Identifies the node as an interrupt controller.
+- #interrupt-cells: Specifies the number of cells needed to encode an
+ interrupt source. The value shall be 2.
+
+The interrupt sources are as follows:
+
+ID Name
+------------
+0: PULSE_DUMMY
+1: I2C
+2: NAND_NFSC
+3: SDMMC1
+4: SDMMC2
+5: SDMMC3
+6: SPI1
+7: SPI2
+8: SPI3
+9: UART1
+10: UART2
+11: UART3
+12: GPIO1
+13: GPIO2
+14: GPIO3
+15: KEYPAD
+16: TIMER
+17: TIMEROS
+18: COMREG0
+19: COMREG1
+20: USB
+21: DMC
+22: DMA
+23: CAMERA
+24: GOUDA
+25: GPU
+26: VPU_JPG
+27: VPU_HOST
+28: VOC
+29: AUIFC0
+30: AUIFC1
+31: L2CC
+
+Example:
+ apb@20800000 {
+ compatible = "simple-bus";
+ ...
+ intc: interrupt-controller@0 {
+ compatible = "rda,8810pl-intc";
+ reg = <0x0 0x1000>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };