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authorJun Nie <jun.nie@linaro.org>2015-06-29 05:35:56 +0300
committerLinus Walleij <linus.walleij@linaro.org>2015-07-16 11:11:41 +0300
commit24f743a0f06675da4e7c6a07b88e90d425edd30a (patch)
treede3f1acbbad9e412486fcfa3882c80d36925e81e /Documentation/devicetree/bindings/gpio/zx296702-gpio.txt
parent39561e8bbb49752092b6afd9764d3f3aeef4e1d2 (diff)
downloadlinux-24f743a0f06675da4e7c6a07b88e90d425edd30a.tar.xz
gpio: Document ZTE zx296702 GPIO DT binding
Add document of ZTE zx296702 GPIO binding Signed-off-by: Jun Nie <jun.nie@linaro.org> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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+ZTE ZX296702 GPIO controller
+
+Required properties:
+- compatible : "zte,zx296702-gpio"
+- #gpio-cells : Should be two. The first cell is the pin number and the
+ second cell is used to specify optional parameters:
+ - bit 0 specifies polarity (0 for normal, 1 for inverted)
+- gpio-controller : Marks the device node as a GPIO controller.
+- interrupts : Interrupt mapping for GPIO IRQ.
+- gpio-ranges : Interaction with the PINCTRL subsystem.
+
+gpio1: gpio@b008040 {
+ compatible = "zte,zx296702-gpio";
+ reg = <0xb008040 0x40>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-ranges = < &pmx0 0 54 2 &pmx0 2 59 14>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-parent = <&intc>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ clock-names = "gpio_pclk";
+ clocks = <&lsp0clk ZX296702_GPIO_CLK>;
+};