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authorJean-Francois Moine <moinejf@free.fr>2016-03-30 19:43:29 +0300
committerMaxime Ripard <maxime.ripard@free-electrons.com>2016-04-22 01:29:22 +0300
commit5ed400dd96d8222e667ee473c7ebd676f05113f8 (patch)
tree5661b530666742ad5b9cd05d21ad1d991d23d5ad /Documentation/devicetree/bindings/clock/sunxi.txt
parent8f0767611a0ed719caf975d899d8431834ace2d8 (diff)
downloadlinux-5ed400dd96d8222e667ee473c7ebd676f05113f8.tar.xz
clk: sunxi: Add sun6i/8i display support
Add the clock type which is used by the sun6i/8i families for video display. Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Diffstat (limited to 'Documentation/devicetree/bindings/clock/sunxi.txt')
-rw-r--r--Documentation/devicetree/bindings/clock/sunxi.txt1
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
index 834436fbe83d..9de34a832023 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -81,6 +81,7 @@ Required properties:
"allwinner,sun9i-a80-usb-mod-clk" - for usb gates + resets on A80
"allwinner,sun9i-a80-usb-phy-clk" - for usb phy gates + resets on A80
"allwinner,sun4i-a10-ve-clk" - for the Video Engine clock
+ "allwinner,sun6i-a31-display-clk" - for the display clocks
Required properties for all clocks:
- reg : shall be the control register address for the clock.