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authorJoseph Lo <josephl@nvidia.com>2013-04-03 15:31:27 +0400
committerStephen Warren <swarren@nvidia.com>2013-04-04 00:29:56 +0400
commit7021d1220584ab1e6efd3d59da47b65674d9896a (patch)
treef347a80205ab3bd8fba9d162dd1e65c56254a04f /Documentation/devicetree/bindings/arm/tegra
parent7495b2eb0770b85e58af98b99faaf853e9563784 (diff)
downloadlinux-7021d1220584ab1e6efd3d59da47b65674d9896a.tar.xz
ARM: tegra: add clock source of PMC to device trees
Adding the bindings of the clock source of PMC in DT. Signed-off-by: Joseph Lo <josephl@nvidia.com> Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/tegra')
-rw-r--r--Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt29
1 files changed, 28 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
index b5846e21cc2e..ee529b17cb9f 100644
--- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
+++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt
@@ -1,9 +1,15 @@
NVIDIA Tegra Power Management Controller (PMC)
-Properties:
+Required properties:
- name : Should be pmc
- compatible : Should contain "nvidia,tegra<chip>-pmc".
- reg : Offset and length of the register set for the device
+- clocks : Must contain an entry for each entry in clock-names.
+- clock-names : Must include the following entries:
+ "pclk" (The Tegra clock of that name),
+ "clk32k_in" (The 32KHz clock input to Tegra).
+
+Optional properties:
- nvidia,invert-interrupt : If present, inverts the PMU interrupt signal.
The PMU is an external Power Management Unit, whose interrupt output
signal is fed into the PMC. This signal is optionally inverted, and then
@@ -12,8 +18,29 @@ Properties:
Example:
+/ SoC dts including file
pmc@7000f400 {
compatible = "nvidia,tegra20-pmc";
reg = <0x7000e400 0x400>;
+ clocks = <&tegra_car 110>, <&clk32k_in>;
+ clock-names = "pclk", "clk32k_in";
nvidia,invert-interrupt;
};
+
+/ Tegra board dts file
+{
+ ...
+ clocks {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clk32k_in: clock {
+ compatible = "fixed-clock";
+ reg=<0>;
+ #clock-cells = <0>;
+ clock-frequency = <32768>;
+ };
+ };
+ ...
+};