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author | Heiko Stuebner <heiko@sntech.de> | 2014-09-09 17:37:27 +0400 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2014-09-13 22:28:05 +0400 |
commit | fd14e6f9b461c73c8706a2c7d3fb12fe07e59942 (patch) | |
tree | 51a861d73ec399f7aad258c17b7de803f7551ae6 | |
parent | ce6965ebcc0a5fa4bcaeba14956ae57c4e7f339c (diff) | |
download | linux-fd14e6f9b461c73c8706a2c7d3fb12fe07e59942.tar.xz |
ARM: dts: rockchip: add dwc2 controllers for rk3066 and rk3188
Add the two dwc2 controllers providing an otg and a designated host port.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r-- | arch/arm/boot/dts/rk3xxx.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi index c021df3b01c3..c873624af6aa 100644 --- a/arch/arm/boot/dts/rk3xxx.dtsi +++ b/arch/arm/boot/dts/rk3xxx.dtsi @@ -91,6 +91,24 @@ status = "disabled"; }; + usb_otg: usb@10180000 { + compatible = "rockchip,rk3066-usb", "snps,dwc2"; + reg = <0x10180000 0x40000>; + interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_OTG0>; + clock-names = "otg"; + status = "disabled"; + }; + + usb_host: usb@101c0000 { + compatible = "snps,dwc2"; + reg = <0x101c0000 0x40000>; + interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru HCLK_OTG1>; + clock-names = "otg"; + status = "disabled"; + }; + mmc0: dwmmc@10214000 { compatible = "rockchip,rk2928-dw-mshc"; reg = <0x10214000 0x1000>; |