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authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-06 22:27:25 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-06 22:27:25 +0300
commit19b022572b9e0fa8ce5490db888714ecb2b1293e (patch)
treeaccc2ff5dee2b2062aeda1361cf0adb30d5146f6
parent15bd1e5cb36306a015328aa1c2b6470a25153171 (diff)
parent5476b2b77dae50c88aa6a85f21abeac38dde590f (diff)
downloadlinux-19b022572b9e0fa8ce5490db888714ecb2b1293e.tar.xz
Merge git://www.linux-watchdog.org/linux-watchdog
Pull watchdog fix from Wim Van Sebroeck: "Fix the watchdog mask bit offset for Exynos7" * git://www.linux-watchdog.org/linux-watchdog: watchdog: s3c2410_wdt: Fix the mask bit offset for Exynos7
-rw-r--r--drivers/watchdog/s3c2410_wdt.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 8532c3e2aea7..1626dc66e763 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -161,7 +161,7 @@ static const struct s3c2410_wdt_variant drv_data_exynos5420 = {
static const struct s3c2410_wdt_variant drv_data_exynos7 = {
.disable_reg = EXYNOS5_WDT_DISABLE_REG_OFFSET,
.mask_reset_reg = EXYNOS5_WDT_MASK_RESET_REG_OFFSET,
- .mask_bit = 0,
+ .mask_bit = 23,
.rst_stat_reg = EXYNOS5_RST_STAT_REG_OFFSET,
.rst_stat_bit = 23, /* A57 WDTRESET */
.quirks = QUIRK_HAS_PMU_CONFIG | QUIRK_HAS_RST_STAT,