arch/riscv/dts/dubhe_fpga_common.dtsi


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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/* Copyright (c) 2021 StarFive Technology Co., Ltd. */

#include "dubhe-fpga-u-boot.dtsi"

/ {
	model = "StarFive Dubhe FPGA";

	aliases {
		serial0 = &uart0;
		spi0 = &qspi1;
	};

	chosen {
		bootargs = "console=ttySIF0,115200 earlycon=sbi ip=:::255.255.255.0::eth0:dhcp";
	};

	cpus {
		timebase-frequency = <25000000>;

	};

	memory@80000000 {
		device_type = "memory";
		reg = <0x0 0x80000000 0x2 0x0>;
	};

	soc {
		fpga_2p5mhz_clk: fpga_2p5mhz_clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <2500000>;
		};

		fpga_50mhz_clk: fpga_50mhz_clk {
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <50000000>;
		};
	};
};

&gmac0 {
	status = "okay";
	phy-mode = "rgmii-id";
	mac-address = [de ad be ef de ad];
	// clk_csr = <3>;
	// max-speed = <10>;
	phy-handle = <&ethernet_phy0>;
	clocks = <&fpga_2p5mhz_clk>,
		 <&fpga_2p5mhz_clk>,
		 <&fpga_2p5mhz_clk>,
		 <&fpga_50mhz_clk>,
		 <&fpga_50mhz_clk>,
		 <&fpga_2p5mhz_clk>;

	mdio0 {
		compatible = "snps,dwmac-mdio";
		#address-cells = <1>;
		#size-cells = <0>;
		ethernet_phy0: ethernet-phy@0 {
			reg = <0>;
			max-speed = <10>;
		};
	};
};

&spi0 {
	status = "okay";
	mmc@0 {
		compatible = "mmc-spi-slot";
		reg = <0>;
		spi-max-frequency = <20000000>;
		voltage-ranges = <3300 3300>;
		disable-wp;
	};
};

&qspi1 {
	status = "okay";

	flash@0 {
                compatible = "jedec,spi-nor";
                reg = <0>;
                spi-max-frequency = <20000000>;
                m25p,fast-read;
                spi-tx-bus-width = <1>;
                spi-rx-bus-width = <1>;

                partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				reg = <0x000000 0x1000>;
				label = "Boot Copier";
				/*read-only;*/
			};

			partition@1000 {
				reg = <0x1000 0x1000>;
				label = "Boot Jump Code";
				/*read-only;*/
			};

			partition@2000 {
				reg = <0x2000 0x40000>;
				label = "U-Boot SPL";
			};

			partition@42000 {
				reg = <0x00042000 0x00100000>;
				label = "U-Boot FIT Image";
			};

			partition@142000 {
				reg = <0x00142000 0x07ebe000>;
				label = "User";
			};
		};
        };

};

&uart0 {
	status = "okay";
};