From 9f623326eb67b3475797940a21bb405649c0729b Mon Sep 17 00:00:00 2001
From: Eric Nelson <eric@nelint.com>
Date: Sun, 24 Apr 2016 10:54:19 -0700
Subject: imx: mx6: mx6sl_pins: add GPIO variant for SD1_DAT5

This patch adds the IOMUX setting for using SD1_DAT5 as GPIO5:9.

Signed-off-by: Eric Nelson <eric@nelint.com>
Reviewed-by: Peng Fan <van.freenix@gmail.com>
---
 arch/arm/include/asm/arch-mx6/mx6sl_pins.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'arch')

diff --git a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
index 6ba1034b2e..919d83dd90 100644
--- a/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
+++ b/arch/arm/include/asm/arch-mx6/mx6sl_pins.h
@@ -22,6 +22,7 @@ enum {
 	MX6_PAD_SD1_DAT3__USDHC1_DAT3				= IOMUX_PAD(0x0548, 0x0240, 0, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT4__USDHC1_DAT4				= IOMUX_PAD(0x054C, 0x0244, 0, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT5__USDHC1_DAT5				= IOMUX_PAD(0x0550, 0x0248, 0, 0x0000, 0, 0),
+	MX6_PAD_SD1_DAT5__GPIO_5_9				= IOMUX_PAD(0x0550, 0x0248, 5, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT6__USDHC1_DAT6				= IOMUX_PAD(0x0554, 0x024C, 0, 0x0000, 0, 0),
 	MX6_PAD_SD1_DAT7__USDHC1_DAT7				= IOMUX_PAD(0x0558, 0x0250, 0, 0x0000, 0, 0),
 	MX6_PAD_KEY_ROW7__GPIO_4_7					= IOMUX_PAD(0x04B0, 0x01A8, 5, 0x0000, 0, 0),
-- 
cgit v1.2.3