From b218f865e8a7defdcb2c6d87e8d93f9ea7e4e9f5 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 22 Sep 2021 18:29:07 +0200 Subject: mtd: cfi_flash: use cfi_flash_num_flash_banks only when supported When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, CONFIG_SYS_MAX_FLASH_BANKS is replaced by cfi_flash_num_flash_banks, but this variable is defined in drivers/mtd/cfi_flash.c, which is compiled only when CONFIG_FLASH_CFI_DRIVER is activated, in U-Boot or in SPL when CONFIG_SPL_MTD_SUPPORT is activated. This patch deactivates this feature CONFIG_SYS_MAX_FLASH_BANKS_DETECT when flash cfi driver is not activated to avoid compilation issue in the next patch, when CONFIG_SYS_MAX_FLASH_BANKS is used in spi_nor_scan(). Signed-off-by: Patrick Delaunay --- include/mtd/cfi_flash.h | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/include/mtd/cfi_flash.h b/include/mtd/cfi_flash.h index 4963c89642..a1af6fc200 100644 --- a/include/mtd/cfi_flash.h +++ b/include/mtd/cfi_flash.h @@ -157,11 +157,17 @@ struct cfi_pri_hdr { * Use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */ #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT) -#define CONFIG_SYS_MAX_FLASH_BANKS (cfi_flash_num_flash_banks) #define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT +/* map to cfi_flash_num_flash_banks only when supported */ +#if IS_ENABLED(CONFIG_FLASH_CFI_DRIVER) && \ + (!IS_ENABLED(CONFIG_SPL_BUILD) || IS_ENABLED(CONFIG_SPL_MTD_SUPPORT)) +#define CONFIG_SYS_MAX_FLASH_BANKS (cfi_flash_num_flash_banks) /* board code can update this variable before CFI detection */ extern int cfi_flash_num_flash_banks; #else +#define CONFIG_SYS_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT +#endif +#else #define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS #endif -- cgit v1.2.3 From a4f2d83414557f2ad7b63d537e2c31790d0f184d Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 22 Sep 2021 18:29:08 +0200 Subject: mtd: spi: nor: force mtd name to "nor%d" Force the mtd name of spi-nor to "nor" + the driver sequence number: "nor0", "nor1"... beginning after the existing nor devices. This patch is coherent with existing "nand" and "spi-nand" mtd device names. When CFI MTD NOR device are supported, the spi-nor index is chosen after the last CFI device defined by CONFIG_SYS_MAX_FLASH_BANKS. When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, this config is replaced by to cfi_flash_num_flash_banks in the include file mtd/cfi_flash.h. This generic name "nor%d" can be use to identify the mtd spi-nor device without knowing the real device name or the DT path of the device, used with API get_mtd_device_nm() and is used in mtdparts command. This patch also avoids issue when the same NOR device is present 2 times, for example on STM32MP15F-EV1: STM32MP> mtd list SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, \ total 64 MiB List of MTD devices: * nand0 - type: NAND flash - block size: 0x40000 bytes - min I/O: 0x1000 bytes - OOB size: 224 bytes - OOB available: 118 bytes - ECC strength: 8 bits - ECC step size: 512 bytes - bitflip threshold: 6 bits - 0x000000000000-0x000040000000 : "nand0" * mx66l51235l - device: mx66l51235l@0 - parent: spi@58003000 - driver: jedec_spi_nor - path: /soc/spi@58003000/mx66l51235l@0 - type: NOR flash - block size: 0x10000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "mx66l51235l" * mx66l51235l - device: mx66l51235l@1 - parent: spi@58003000 - driver: jedec_spi_nor - path: /soc/spi@58003000/mx66l51235l@1 - type: NOR flash - block size: 0x10000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "mx66l51235l" The same mtd name "mx66l51235l" identify the 2 instances mx66l51235l@0 and mx66l51235l@1. This patch fixes a ST32CubeProgrammer / stm32prog command issue with nor0 target on STM32MP157C-EV1 board introduced by commit b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled"). Fixes: b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled") Signed-off-by: Patrick Delaunay [trini: Add to for DM_MAX_SEQ_STR] Signed-off-by: Tom Rini --- drivers/mtd/spi/spi-nor-core.c | 17 ++++++++++++++--- include/dm/device.h | 3 ++- include/linux/mtd/spi-nor.h | 2 ++ include/mtd.h | 5 +++++ 4 files changed, 23 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index d5d905fa5a..f1b4e5ea8e 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -10,6 +10,7 @@ */ #include +#include #include #include #include @@ -26,6 +27,7 @@ #include #include +#include #include #include @@ -3664,6 +3666,11 @@ int spi_nor_scan(struct spi_nor *nor) struct mtd_info *mtd = &nor->mtd; struct spi_slave *spi = nor->spi; int ret; + int cfi_mtd_nb = 0; + +#ifdef CONFIG_SYS_MAX_FLASH_BANKS + cfi_mtd_nb = CONFIG_SYS_MAX_FLASH_BANKS; +#endif /* Reset SPI protocol for all commands. */ nor->reg_proto = SNOR_PROTO_1_1_1; @@ -3715,8 +3722,12 @@ int spi_nor_scan(struct spi_nor *nor) if (ret) return ret; - if (!mtd->name) - mtd->name = info->name; + if (!mtd->name) { + sprintf(nor->mtd_name, "%s%d", + MTD_DEV_TYPE(MTD_DEV_TYPE_NOR), + cfi_mtd_nb + dev_seq(nor->dev)); + mtd->name = nor->mtd_name; + } mtd->dev = nor->dev; mtd->priv = nor; mtd->type = MTD_NORFLASH; @@ -3821,7 +3832,7 @@ int spi_nor_scan(struct spi_nor *nor) nor->rdsr_dummy = params.rdsr_dummy; nor->rdsr_addr_nbytes = params.rdsr_addr_nbytes; - nor->name = mtd->name; + nor->name = info->name; nor->size = mtd->size; nor->erase_size = mtd->erasesize; nor->sector_size = mtd->erasesize; diff --git a/include/dm/device.h b/include/dm/device.h index 0a9718a5b8..9d0ca6a550 100644 --- a/include/dm/device.h +++ b/include/dm/device.h @@ -207,8 +207,9 @@ struct udevice_rt { u32 flags_; }; -/* Maximum sequence number supported */ +/* Maximum sequence number supported and associated string length */ #define DM_MAX_SEQ 999 +#define DM_MAX_SEQ_STR 3 /* Returns the operations for a device */ #define device_get_ops(dev) (dev->driver->ops) diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h index 7ddc4ba2bf..4ceeae623d 100644 --- a/include/linux/mtd/spi-nor.h +++ b/include/linux/mtd/spi-nor.h @@ -7,6 +7,7 @@ #ifndef __LINUX_MTD_SPI_NOR_H #define __LINUX_MTD_SPI_NOR_H +#include #include #include #include @@ -561,6 +562,7 @@ struct spi_nor { int (*ready)(struct spi_nor *nor); void *priv; + char mtd_name[MTD_NAME_SIZE(MTD_DEV_TYPE_NOR)]; /* Compatibility for spi_flash, remove once sf layer is merged with mtd */ const char *name; u32 size; diff --git a/include/mtd.h b/include/mtd.h index b569331edb..f9e5082446 100644 --- a/include/mtd.h +++ b/include/mtd.h @@ -6,10 +6,15 @@ #ifndef _MTD_H_ #define _MTD_H_ +#include +#include #include int mtd_probe_devices(void); void board_mtdparts_default(const char **mtdids, const char **mtdparts); +/* compute the max size for the string associated to a dev type */ +#define MTD_NAME_SIZE(type) (sizeof(MTD_DEV_TYPE(type)) + DM_MAX_SEQ_STR) + #endif /* _MTD_H_ */ -- cgit v1.2.3 From b81ce79df091834430dce72f0e4d1451f25fc8f7 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Tue, 14 Sep 2021 20:28:24 +0200 Subject: mtd: spi: Set CONFIG_SF_DEFAULT_MODE default to 0 Before e2e95e5e254 ("spi: Update speed/mode on change") most systems silently defaulted to SF bus mode 0. Now the mode is always updated, which causes breakage. It seems most SF which are used as boot media operate in bus mode 0, so switch that as the default. This should fix booting at least on Altera SoCFPGA, ST STM32, Xilinx ZynqMP, NXP iMX and Rockchip SoCs, which recently ran into trouble with mode 3. Marvell Kirkwood and Xilinx microblaze need to be checked as those might need mode 3. Signed-off-by: Marek Vasut Cc: Aleksandar Gerasimovski Cc: Andreas Biessmann Cc: Eugen Hristev Cc: Michal Simek Cc: Patrice Chotard Cc: Patrick Delaunay Cc: Peng Fan Cc: Siew Chin Lim Cc: Tom Rini Cc: Valentin Longchamp Cc: Vignesh Raghavendra --- drivers/mtd/spi/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig index b2291f7290..f03fe05e33 100644 --- a/drivers/mtd/spi/Kconfig +++ b/drivers/mtd/spi/Kconfig @@ -57,7 +57,7 @@ config SF_DEFAULT_CS config SF_DEFAULT_MODE hex "SPI Flash default mode (see include/spi.h)" depends on SPI_FLASH || DM_SPI_FLASH - default 3 + default 0 help The default mode may be provided by the platform to handle the common case when only a single serial -- cgit v1.2.3 From b8919eaa6835c8a606569ea596dd4ed209bd1d67 Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Mon, 13 Sep 2021 16:25:53 +0200 Subject: mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interface nand_dt_init() is still using fdtdec_xx() interface. If OF_LIVE flag is enabled, dt property can't be get anymore. Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue. For doing this, node parameter type must be ofnode. First idea was to convert "node" parameter to ofnode type inside nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode() is not bijective, in case OF_LIVE flag is enabled, it performs an assert(). So, this leads to update nand_chip struct flash_node field from int to ofnode and to update all nand_dt_init() callers. Signed-off-by: Patrice Chotard --- drivers/mtd/nand/raw/denali.c | 2 +- drivers/mtd/nand/raw/mxs_nand.c | 2 +- drivers/mtd/nand/raw/nand_base.c | 27 +++++++++++---------------- drivers/mtd/nand/raw/stm32_fmc2_nand.c | 2 +- drivers/mtd/nand/raw/sunxi_nand.c | 2 +- include/linux/mtd/rawnand.h | 6 +++--- 6 files changed, 18 insertions(+), 23 deletions(-) diff --git a/drivers/mtd/nand/raw/denali.c b/drivers/mtd/nand/raw/denali.c index ab91db8546..c827f80281 100644 --- a/drivers/mtd/nand/raw/denali.c +++ b/drivers/mtd/nand/raw/denali.c @@ -1246,7 +1246,7 @@ int denali_init(struct denali_nand_info *denali) denali->active_bank = DENALI_INVALID_BANK; - chip->flash_node = dev_of_offset(denali->dev); + chip->flash_node = dev_ofnode(denali->dev); /* Fallback to the default name if DT did not give "label" property */ if (!mtd->name) mtd->name = "denali-nand"; diff --git a/drivers/mtd/nand/raw/mxs_nand.c b/drivers/mtd/nand/raw/mxs_nand.c index e6bbfac4d6..748056a43e 100644 --- a/drivers/mtd/nand/raw/mxs_nand.c +++ b/drivers/mtd/nand/raw/mxs_nand.c @@ -1379,7 +1379,7 @@ int mxs_nand_init_ctrl(struct mxs_nand_info *nand_info) nand->options |= NAND_NO_SUBPAGE_WRITE; if (nand_info->dev) - nand->flash_node = dev_of_offset(nand_info->dev); + nand->flash_node = dev_ofnode(nand_info->dev); nand->cmd_ctrl = mxs_nand_cmd_ctrl; diff --git a/drivers/mtd/nand/raw/nand_base.c b/drivers/mtd/nand/raw/nand_base.c index 3679ee727e..b1fd779884 100644 --- a/drivers/mtd/nand/raw/nand_base.c +++ b/drivers/mtd/nand/raw/nand_base.c @@ -29,9 +29,6 @@ #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt #include -#if CONFIG_IS_ENABLED(OF_CONTROL) -#include -#endif #include #include #include @@ -4576,23 +4573,20 @@ ident_done: EXPORT_SYMBOL(nand_get_flash_type); #if CONFIG_IS_ENABLED(OF_CONTROL) -#include -DECLARE_GLOBAL_DATA_PTR; -static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node) +static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode node) { int ret, ecc_mode = -1, ecc_strength, ecc_step; - const void *blob = gd->fdt_blob; const char *str; - ret = fdtdec_get_int(blob, node, "nand-bus-width", -1); + ret = ofnode_read_s32_default(node, "nand-bus-width", -1); if (ret == 16) chip->options |= NAND_BUSWIDTH_16; - if (fdtdec_get_bool(blob, node, "nand-on-flash-bbt")) + if (ofnode_read_bool(node, "nand-on-flash-bbt")) chip->bbt_options |= NAND_BBT_USE_FLASH; - str = fdt_getprop(blob, node, "nand-ecc-mode", NULL); + str = ofnode_read_string(node, "nand-ecc-mode"); if (str) { if (!strcmp(str, "none")) ecc_mode = NAND_ECC_NONE; @@ -4608,9 +4602,10 @@ static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node) ecc_mode = NAND_ECC_SOFT_BCH; } - - ecc_strength = fdtdec_get_int(blob, node, "nand-ecc-strength", -1); - ecc_step = fdtdec_get_int(blob, node, "nand-ecc-step-size", -1); + ecc_strength = ofnode_read_s32_default(node, + "nand-ecc-strength", -1); + ecc_step = ofnode_read_s32_default(node, + "nand-ecc-step-size", -1); if ((ecc_step >= 0 && !(ecc_strength >= 0)) || (!(ecc_step >= 0) && ecc_strength >= 0)) { @@ -4627,13 +4622,13 @@ static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node) if (ecc_step > 0) chip->ecc.size = ecc_step; - if (fdt_getprop(blob, node, "nand-ecc-maximize", NULL)) + if (ofnode_read_bool(node, "nand-ecc-maximize")) chip->ecc.options |= NAND_ECC_MAXIMIZE; return 0; } #else -static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, int node) +static int nand_dt_init(struct mtd_info *mtd, struct nand_chip *chip, ofnode node) { return 0; } @@ -4657,7 +4652,7 @@ int nand_scan_ident(struct mtd_info *mtd, int maxchips, struct nand_flash_dev *type; int ret; - if (chip->flash_node) { + if (ofnode_valid(chip->flash_node)) { ret = nand_dt_init(mtd, chip, chip->flash_node); if (ret) return ret; diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c index fd81a9500b..e17f1f8975 100644 --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c @@ -823,7 +823,7 @@ static int stm32_fmc2_nfc_parse_child(struct stm32_fmc2_nfc *nfc, ofnode node) nand->cs_used[i] = cs[i]; } - nand->chip.flash_node = ofnode_to_offset(node); + nand->chip.flash_node = node; return 0; } diff --git a/drivers/mtd/nand/raw/sunxi_nand.c b/drivers/mtd/nand/raw/sunxi_nand.c index 7bc6ec7bee..c378f08f68 100644 --- a/drivers/mtd/nand/raw/sunxi_nand.c +++ b/drivers/mtd/nand/raw/sunxi_nand.c @@ -1711,7 +1711,7 @@ static int sunxi_nand_chip_init(int node, struct sunxi_nfc *nfc, int devnum) * in the DT. */ nand->ecc.mode = NAND_ECC_HW; - nand->flash_node = node; + nand->flash_node = offset_to_ofnode(node); nand->select_chip = sunxi_nfc_select_chip; nand->cmd_ctrl = sunxi_nfc_cmd_ctrl; nand->read_buf = sunxi_nfc_read_buf; diff --git a/include/linux/mtd/rawnand.h b/include/linux/mtd/rawnand.h index 66febc6b72..2fba9dc317 100644 --- a/include/linux/mtd/rawnand.h +++ b/include/linux/mtd/rawnand.h @@ -891,7 +891,7 @@ struct nand_chip { void __iomem *IO_ADDR_R; void __iomem *IO_ADDR_W; - int flash_node; + ofnode flash_node; uint8_t (*read_byte)(struct mtd_info *mtd); u16 (*read_word)(struct mtd_info *mtd); @@ -973,12 +973,12 @@ struct nand_chip { static inline void nand_set_flash_node(struct nand_chip *chip, ofnode node) { - chip->flash_node = ofnode_to_offset(node); + chip->flash_node = node; } static inline ofnode nand_get_flash_node(struct nand_chip *chip) { - return offset_to_ofnode(chip->flash_node); + return chip->flash_node; } static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd) -- cgit v1.2.3 From 24ea366add54b8ca753eb3259bff8b50693dc8ef Mon Sep 17 00:00:00 2001 From: Rasmus Villemoes Date: Thu, 16 Sep 2021 16:53:14 +0200 Subject: imx: imx7d-sdb: fix ethernet, sync .dts with linux MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 0d52bab46 (mx7dsabre: Enable DM_ETH) changed these flags from 0 (aka GPIO_ACTIVE_HIGH) to GPIO_ACTIVE_LOW. It claimed to "Also sync device tree with v5.5-rc1", but in the linux tree, these gpios have always been GPIO_ACTIVE_HIGH ever since this node was introduced around v4.13 (linux commit 184f39b5). I'm guessing that the reason for the GPIO_ACTIVE_LOW was to work around the behaviour of the soft-spi driver back then, which effectively defaulted to spi-mode 3 and not 0. That was arguably a bug in the soft-spi driver, which then got fixed in 0e146993bb3 (spi: add support for all spi modes with soft spi), but that commit then broke ethernet on this board. Fix it by setting the gpios as active high, which as a bonus actually brings us in sync with the .dts in the linux source tree. Without this, one gets Net: Could not get PHY for FEC0: addr 0 No ethernet found. With this, ethernet (at least ping and tftp) works as expected from the U-Boot shell. Cc: Fabio Estevam Cc: Joris Offouga Cc: "Christian Bräuner Sørensen" Signed-off-by: Rasmus Villemoes --- arch/arm/dts/imx7d-sdb.dts | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/dts/imx7d-sdb.dts b/arch/arm/dts/imx7d-sdb.dts index 8191ac7c33..ea2e58dd5a 100644 --- a/arch/arm/dts/imx7d-sdb.dts +++ b/arch/arm/dts/imx7d-sdb.dts @@ -44,9 +44,9 @@ compatible = "spi-gpio"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_spi4>; - gpio-sck = <&gpio1 13 GPIO_ACTIVE_LOW>; - gpio-mosi = <&gpio1 9 GPIO_ACTIVE_LOW>; - cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; + gpio-sck = <&gpio1 13 GPIO_ACTIVE_HIGH>; + gpio-mosi = <&gpio1 9 GPIO_ACTIVE_HIGH>; + cs-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>; num-chipselects = <1>; #address-cells = <1>; #size-cells = <0>; -- cgit v1.2.3