From 89b6b13a57b2fa437ca21fe27148eb80fee4ea19 Mon Sep 17 00:00:00 2001 From: Ley Foon Tan Date: Wed, 19 Jun 2024 14:57:24 +0800 Subject: riscv: dts: dubhe-70: Remove Svpbmt Remove Svpmbt from Dubhe-70. Signed-off-by: Ley Foon Tan --- arch/riscv/dts/dubhe70-cpus.dtsi | 8 ++++---- arch/riscv/dts/dubhe70_fpga-u-boot.dtsi | 8 ++++---- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/riscv/dts/dubhe70-cpus.dtsi b/arch/riscv/dts/dubhe70-cpus.dtsi index c24cdf356e..a5b12ad4ef 100644 --- a/arch/riscv/dts/dubhe70-cpus.dtsi +++ b/arch/riscv/dts/dubhe70-cpus.dtsi @@ -36,7 +36,7 @@ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zba", "zbb", "zbc", "zbs", "zicbom", "zicbop", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihintpause", - "zihpm", "svinval", "svnapot", "svpbmt", "sscofpmf"; + "zihpm", "svinval", "svnapot", "sscofpmf"; riscv,cbom-block-size = <64>; riscv,cboz-block-size = <64>; d-cache-block-size = <64>; @@ -69,7 +69,7 @@ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zba", "zbb", "zbc", "zbs", "zicbom", "zicbop", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihintpause", - "zihpm", "svinval", "svnapot", "svpbmt", "sscofpmf"; + "zihpm", "svinval", "svnapot", "sscofpmf"; riscv,cbom-block-size = <64>; riscv,cboz-block-size = <64>; d-cache-block-size = <64>; @@ -102,7 +102,7 @@ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zba", "zbb", "zbc", "zbs", "zicbom", "zicbop", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihintpause", - "zihpm", "svinval", "svnapot", "svpbmt", "sscofpmf"; + "zihpm", "svinval", "svnapot", "sscofpmf"; riscv,cbom-block-size = <64>; riscv,cboz-block-size = <64>; d-cache-block-size = <64>; @@ -135,7 +135,7 @@ riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zba", "zbb", "zbc", "zbs", "zicbom", "zicbop", "zicboz", "zicntr", "zicond", "zicsr", "zifencei", "zihintpause", - "zihpm", "svinval", "svnapot", "svpbmt", "sscofpmf"; + "zihpm", "svinval", "svnapot", "sscofpmf"; riscv,cbom-block-size = <64>; riscv,cboz-block-size = <64>; d-cache-block-size = <64>; diff --git a/arch/riscv/dts/dubhe70_fpga-u-boot.dtsi b/arch/riscv/dts/dubhe70_fpga-u-boot.dtsi index 6e069b5801..ef9bd75197 100644 --- a/arch/riscv/dts/dubhe70_fpga-u-boot.dtsi +++ b/arch/riscv/dts/dubhe70_fpga-u-boot.dtsi @@ -4,17 +4,17 @@ #include "dubhe_fpga_common-u-boot.dtsi" &cpu0 { - riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot_svpbmt"; + riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot"; }; &cpu1 { - riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot_svpbmt"; + riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot"; }; &cpu2 { - riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot_svpbmt"; + riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot"; }; &cpu3 { - riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot_svpbmt"; + riscv,isa = "rv64imafdch_zba_zbb_zbc_zbs_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_sscofpmf_svinval_svnapot"; }; -- cgit v1.2.3