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2021-03-27x86: p2sb: Drop LOG_DEBUGSimon Glass1-1/+0
We should not enable debugging by default. Drop this. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-27mtd: spi_flash_free()Heinrich Schuchardt1-5/+0
dfu_free_entities() invoking dfu_free_entity_sf() has let to segementation faults due to double freeing the same device. spi_flash_free() is not relevant for the driver model but exists only for compatibility with old drivers. We must not remove any device here: * The device may still be referenced. * We don't want to have to probe again. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-26Merge tag 'dm-pull-26mar21-take2' of git://git.denx.de/u-boot-dm into nextTom Rini17-125/+237
dtoc support for of-platdata-inst driver model support for of-platdata-inst support of-platdata-inst on x86 / coral binman support for exapanded entries binman convert docs to reST ti-sysc fix for duplicate uclass driver patman minor improvements pylibfdt build only if needed correct obscure CI error with OF_PLATDATA_INST
2021-03-26dm: core: Use separate priv/plat data regionSimon Glass2-6/+15
Make use of the new priv/plat data region if enabled. This is implemented as a simple offset from the position set up by dtoc to the new position. So long as all access goes through dm_priv_to_rw() this is safe. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: core: Allow storing priv/plat data separatelySimon Glass1-0/+12
At present the device priv/data data allocated by dtoc is stored in the data section along with other variables. On some platforms it is better to allocate space for it separately, e.g. if SPL is running from read-only memory. Create a new space with the same size as that allocated by dtoc, ready for use. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: core: Move flags to device-runtime infoSimon Glass1-0/+33
When of-platdata-inst is active, use the flags in the new udevice_rt table, dropping them from the main struct udevice. This ensures that the latter is not updated at runtime. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: core: Create a struct for device runtime infoSimon Glass1-1/+13
At present when driver model needs to change a device it simply updates the struct udevice structure. But with of-platdata-inst most of the fields are not modified at runtime. In fact, typically only the flags need to change. For systems running SPL from read-only memory it is convenient to separate out the runtime information, so that the devices don't need to be copied before being used. Create a new udevice_rt table, similar to the existing driver_rt. For now it just holds the flags, although they are not used in this patch. Add a new Kconfig for the driver_rt data, since this is not needed when of-platdata-inst is used. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26Revert "sandbox: Disable I2C emulators in SPL"Simon Glass1-2/+0
With recent changes this can be supported again. Add it back. This reverts commit d85f2c4f2970d0ec2f5f075de734afd11200d153. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26sandbox: i2c: Support i2c emulation with of-platdataSimon Glass2-2/+28
At present the i2c emulators require access to the devicetree, which is not possible (by design) with of-platdata. Add a way for drivers to record the of-platdata index of their emulator, so that we can still find the emulator. This allows i2c emulation to work with of-platdata. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: Rename device_get_by_driver_info_idx()Simon Glass4-7/+13
This function finds a device by its driver_info index. With of-platdata-inst we do not use driver_info, but instead instantiate udevice records at build-time. However the semantics of using the function are the same in each case: the caller provides an index and gets back a device. So rename the function to device_get_by_ofplat_idx(), so that it can be used for both situations. The caller does not really need to worry about the details. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26sandbox: i2c: Move platdata structs to header filesSimon Glass2-31/+1
At present the structs used by these drivers are declared in the C files and so are not accessible to dtoc. Move them to header files, as required. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: core: Drop uclass_find_device_by_phandle() with of-platdataSimon Glass1-1/+1
At present this function is included in the build but with of-platdata it only services to produce a confusing link error complaining about a call to dev_read_u32_default(). Drop it so that any call to uclass_find_device_by_phandle() is flagged as an error, making it easier to see what is going on. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26dm: core: Drop device_get_by_driver_info()Simon Glass1-15/+0
This function is now only used in a test. Drop it. Also drop DM_DRVINFO_GET() which was the only purpose for having the function. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26clk: sandbox: Create a special fixed-rate driverSimon Glass1-0/+33
Create a version of this driver for sandbox so that it can use the of-platdata struct. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26clk: fixed-rate: Export driver parts for OF_PLATDATA_INSTSimon Glass1-4/+10
We need to allow SoCs to create their own drivers for this so that they can use their own of-platdata structs. To minimise code duplication, export the driver operations and the ofdata_to_plat() setup function. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26clk: sandbox: Move priv/plat data to a header fileSimon Glass2-13/+0
At present the structs used by this driver are not accessible outside it, so cannot be used with OF_PLATDATA_INST. Move them to a header file to fix this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-25dfu: dfu_sf: avoid double free of SPI deviceHeinrich Schuchardt1-1/+17
Multiple DFU entities may share the same SPI device. We must make sure that the SPI device is only freed once. When using the driver model it is not necessary to free the SPI device. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Acked-by: Lukasz Majewski <lukma@denx.de>
2021-03-23mtd: rawnand: fsl_ifc: fix FSL NAND driver to read all ONFI parameter pagesMaxim Kochetkov1-7/+10
Linux commit a75bbe71a27 ("mtd: rawnand: fsl_ifc: fix FSL NAND driver to read all ONFI parameter pages") Per ONFI specification (Rev. 4.0), if the CRC of the first parameter page read is not valid, the host should read redundant parameter page copies. Fix FSL NAND driver to read the two redundant copies which are mandatory in the specification. Signed-off-by: Jane Wan <Jane.Wan@nokia.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Maxim Kochetkov <fido_max@inbox.ru> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-23pci: layerscape: Change to allocate zeroed memery for struct ls_pcieHou Zhiqiang2-2/+2
As on some incipient Layerscape platforms (LS1043A series) there isn't separate PF control register block, these registers reside in the LUT register block, so when the driver detected there isn't 'ctrl', it will assign the 'lut' address to the ls_pcie->ctrl. The current code allocate memory for the struct ls_pcie with random contents, this can result in skipping to assign the ls_pcie->ctrl with the 'lut' address, then further crash with the incorrect address. Fixes: 118e58e26eba ("pci: layerscape: Split the EP and RC driver") Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-23rtc: ds1307: Add ds1339 compatibleChris Packham1-0/+2
As far as u-boot is concerned the ds1339 is compatible with the other devices supported by the ds1307 driver. The Linux driver does expose some additional functionality but as far as u-boot is concerned just adding the compatible string is enough. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-22dm: core: Skip adding uclasses with OF_PLATDATA_INSTSimon Glass1-1/+4
There is no need to ever add new uclasses since these are set up at build time. Update the code to return an error if this is attempted. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dm: core: Set up driver model for OF_PLATDATA_INSTSimon Glass1-12/+30
With this we don't need to scan and bind drivers, not even the root device. We just need to locate the root device that was set up at build time, then set our root in global_data to point to it. Update the code to handle this case. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dm: core: Adjust uclass setup with of-platdataSimon Glass1-2/+6
When OF_PLATDATA_INST is enabled we don't need to create the uclass list. Instead we just need to point to the existing list. Update the code accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dm: core: Allow dropping run-time binding of devicesSimon Glass1-17/+25
With OF_PLATDATA_INST devices are bound at build time. We should not need binding of devices at runtime in most cases. However it is inflexible to absolutely prohibit it, so add an option to control this. Update the driver model core so that it does not bind devices. Update device_bind() to return an error if called. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22bus: ti-sysc: change in a normal driverDario Binacchi1-6/+0
The module defines a duplicate uclass driver for UCLASS_SIMPLE_BUS, but it is not allowed. This breaks of-platdata and makes the result non-deterministic. The driver does not need to be an uclass driver, so lets remove it. I had turned it into an uclass driver because I thought wrongly it had to call the dm_scan_fdt_dev routine to work properly, but some tests on the board have shown otherwise. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-22dtoc: Generate device instancesSimon Glass1-0/+4
Add support for generating a file containing udevice instances. This avoids the need to create these at run time. Update a test uclass to include a 'per_device_plat_auto' member, to increase test coverage. Add another tab to the driver_info output so it lines up nicely like the device-instance output. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dtoc: Generate uclass devicesSimon Glass1-0/+1
Add support for generating a file containing uclass instances. This avoids the need to create these at run time. Update a test uclass to include a 'priv_auto' member, to increase test coverage. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22sandbox: i2c: Rename driver names to work with of-platdataSimon Glass2-3/+3
Some of these do not follow the rules. Make sure the driver name matches the compatible string in all cases. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dtoc: Assign a sequence number to each nodeSimon Glass1-2/+4
Now that we have the alias information we can assign a sequence number to each device in the uclass. Store this in the node associated with each device. This requires renaming the sandbox test drivers to have the right name. Note that test coverage is broken with this patch, but fixed in the next one. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22dm: error handling dev_get_dma_range()Heinrich Schuchardt1-2/+2
goto after return has not effect. Calling of_node_put() in case of some errors and not for others is inconsistent. Fixes: 51bdb50904b ("dm: Introduce xxx_get_dma_range()") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-22mmc: pci: Fix Kconfig dependencyBin Meng1-0/+1
The PCI MMC driver depends on the generic MMC SDHCI driver, otherwise it does not compile. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-03-20serial: mtk: rewrite the setbrg functionWeijie Gao1-41/+33
Currently the setbrg logic of serial-mtk is messy, and should be rewritten. Also an option is added to make it possible to use highspeed-3 mode for all bauds. The new logic is: 1. If baud clock > 12MHz a) If baud <= 115200, highspeed-0 mode will be used (ns16550 compatible) b) If baud <= 576000, highspeed-2 mode will be used c) any bauds > 576000, highspeed-3 mode will be used 2. If baud clock <= 12MHz Forced highspeed-3 mode a) If baud <= 115200, calculates the divisor using DIV_ROUND_CLOSEST b) any bauds > 115200, the same as 1. c) Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20pinctrl: mt7629: add jtag function and pin groupWeijie Gao1-0/+7
The EPHY LEDs of mt7629 can be used as JTAG. This patch adds the jtag pin group to the pinctrl driver. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20pinctrl: mediatek: do not probe gpio driver if not enabledWeijie Gao1-4/+8
The mtk pinctrl driver is a combination driver with support for both pinctrl and gpio. When this driver is used in SPL, gpio support may not be enabled, and this will result in a compilation error. To fix this, macros are added to make sure gpio related code will only be compiled when gpio support is enabled. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20pinctrl: mediatek: add get_pin_muxing ops for mediatek pinctrlSam Shih1-0/+14
This patch add get_pin_muxing support for mediatek pinctrl drivers Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2021-03-20pinctrl: mediatek: fix wrong assignment in mtk_get_pin_nameSam Shih1-1/+1
This is a bug fix for mtk pinctrl common part. Appearently pins should be used instead of grps in mtk_get_pin_name(). Signed-off-by: Sam Shih <sam.shih@mediatek.com>
2021-03-19nvme: Elaborate on cache maintenance operation in get/set_featuresAndre Przywara1-5/+20
At the moment the nvme_get_features() and nvme_set_features() functions carry a (somewhat misleading) comment about missing cache maintenance. As it turns out, nvme_get_features() has no caller at all in the tree, and nvme_set_features' only user doesn't use a DMA buffer. Mention that in the comment, and leave some breadcrumbs for the future, should those functions attract more users. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-19nvme: Always invalidate whole cqes[] arrayAndre Przywara1-4/+12
At the moment nvme_read_completion_status() tries to invalidate a single member of the cqes[] array, which is shady as just a single entry is not cache line aligned. The structure is dictated by hardware, and with 16 bytes is smaller than any cache line we usually deal with. Also multiple entries need to be consecutive in memory, so we can't pad them to cover a whole cache line. As a consequence we can only always invalidate all of them - U-Boot just uses two of them anyway. This is fine, as they are only ever read by the CPU (apart from the initial zeroing), so they can't become dirty. Make this obvious by always invalidating the whole array, regardless of the entry number we are about to read. Also blow up the allocation size to cover whole cache lines, to avoid other heap allocations to sneak in. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Tested-by: Neil Armstrong <narmstrong@baylibre.com>
2021-03-19bus: ti-sysc: change in a normal driverDario Binacchi1-6/+0
The module defines a duplicate uclass driver for UCLASS_SIMPLE_BUS, but it is not allowed. This breaks of-platdata and makes the result non-deterministic. The driver does not need to be an uclass driver, so lets remove it. I had turned it into an uclass driver because I thought wrongly it had to call the dm_scan_fdt_dev routine to work properly, but some tests on the board have shown otherwise. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-19ahci: mediatek: fix undefined reference of dev_errFrank Wunderlich1-0/+1
building with MTK_AHCI enabled results in implicit declaration and undefined reference of dev_err followed by a segfault of gcc drivers/ata/mtk_ahci.c: In function 'mtk_ahci_parse_property': drivers/ata/mtk_ahci.c:65:4: warning: implicit declaration of function 'dev_err' drivers/ata/mtk_ahci.c:65: undefined reference to `dev_err' in function `mtk_ahci_probe': drivers/ata/mtk_ahci.c:92: undefined reference to `dev_err' Segmentation fault fix this by adding the dm/device_compat.h to includes Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
2021-03-17mmc: mtk-sd: don't ignore max-frequency from device treeDaniel Golle1-1/+2
commit e58e68d9 ("mmc: mtk-sd: assign plat->cfg.f_max with a correct value") wrongly assumed that plat->cfg.f_max is always unset at the time mscd_drv_probe() is run. This is not true in case max-frequency being defined in device tree, as it is then already set by mmc_of_parse() in msdc_of_to_plat(). Only set plat->cfg.f_max to the default maximum value in case it is not already set to a sane value. Fixes: e58e68d93e ("mmc: mtk-sd: assign plat->cfg.f_max with a correct value") Cc: Stefan Roese <sr@denx.de> Cc: Weijie Gao <weijie.gao@mediatek.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org>
2021-03-16pinctrl: renesas: Add support for R8A774C0Lad Prabhakar4-0/+23
Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car E3 (a.k.a. r8a77990), however it doesn't have several automotive specific peripherals. This patch hooks R8A774C0 SoC with the pfc driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16pinctrl: renesas: pfc-r8a77990: Sync PFC tables with Linux 5.11Lad Prabhakar1-2/+85
Sync the R8A77990 SoC PFC tables with Linux 5.11 , commit f40ddce88593. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-15Merge tag 'v2021.04-rc4' into nextTom Rini52-228/+306
Prepare v2021.04-rc4
2021-03-15Merge tag 'u-boot-stm32-20210312' of ↵Tom Rini13-46/+56
https://source.denx.de/u-boot/custodians/u-boot-stm - Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver - stm32mp1_trusted_defconfig rely on SCMI support - Remove the nand MTD configuration for NOR boot in stm32mp1 board - STM32programmer update - Bsec: manage clock when present in device tree - stm32mp15: move bootdelay configuration in defconfig - Update for stm32 dsi and dw_mipi_dsi - STM32 MCU's cleanup - Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags - Update stm32mp1 doc
2021-03-14drivers: tee: sandbox: SCP03 control emulatorJorge Ramirez-Ortiz2-1/+59
Adds support for a working SCP03 emulation. Input parameters are validated however the commands (enable, provision) executed by the TEE are assumed to always succeed. Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-13tpm: Correct warning on 32-bit buildSimon Glass1-1/+1
Fix the warning: drivers/tpm/tpm2_tis_sandbox.c: In function ‘sandbox_tpm2_xfer’: drivers/tpm/tpm2_tis_sandbox.c:288:48: warning: format ‘%ld’ expects argument of type ‘long int’, but argument 2 has type ‘size_t’ {aka ‘unsigned int’} [-Wformat=] printf("TPM2: Unmatching length, received: %ld, expected: %d\n", ~~^ %d send_size, length); ~~~~~~~~~ Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-12dm: core: Fix allocation of empty of-platdataSimon Glass1-4/+13
With of-platdata we always have a dtv struct that holds the platform data provided by the driver_info record. However, this struct can be empty if there are no actual devicetree properties provided. The upshot of empty platform data is that it will end up as a zero-size member in the BSS section, which is fine. But if the driver specifies plat_auto then it expects the correct amount of space to be allocated. At present this does not happen, since device_bind() assumes that the platform-data size will always be >0. As a result we end up not allocating the space and just use the BSS region, overwriting whatever other contents are present. Fix this by removing the condition that platform data be non-empty, always allocating space if requested. This fixes a strange bug that has been lurking since of-platdata was implemented. It has likely never been noticed since devices normally have at least some devicetree properties, BSS is seldom used on SPL, the dtv structs are normally at the end of bss and the overwriting only happens if a driver changes its platform data. It was discovered using sandbox_spl, which exercises more features than a normal board might, and the critical global_data variable 'gd' happened to be at the end of BSS. Fixes: 9fa28190091 ("dm: core: Expand platdata for of-platdata devices") Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12arm: mvebu: a38x: Remove dead code ARMADA_39XPali Rohár3-17/+0
Config option ARMADA_39X is never set so remove all dead code hidden under ifdef CONFIG_ARMADA_39X blocks. Also remove useless checks for CONFIG_ARMADA_38X define as this macro is always defined for a38x code path. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-03-12arm: a37xx: pci: Implement workaround for the readback value of VEND_IDPali Rohár1-0/+10
Marvell Armada 3720 Functional Errata, Guidelines, and Restrictions document describes in erratum 4.1 PCIe value of vendor ID (Ref #: 243): The readback value of VEND_ID (RD0070000h [15:0]) is 1B4Bh, while it should read 11ABh. The firmware can write the correct value, 11ABh, through VEND_ID (RD0076044h [15:0]). Implement this workaround in U-Boot PCIe controller driver aardvark for both PCI vendor id and PCI subsystem vendor id. This change affects PCI vendor id of PCIe root bridge emulated by Linux kernel. With this change Linux kernel reports correct vendor id 11AB. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>