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2021-07-27phy: cadence: Add driver for Torrent SERDESAswath Govindraju3-0/+2470
Add driver for Torrent SERDES. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-9-kishon@ti.com
2021-07-27phy: cadence: Add driver for Sierra PHYAlan Douglas5-0/+760
Add a Sierra PHY driver with PCIe and USB support. This driver is a port from the mainline linux driver. The PHY has multiple lanes, which can be configured into groups, and a generic PHY device is created for each group. There are two resets controlling the overall PHY block, one to enable the APB interface for programming registers, and another to enable the PHY itself. Additionally there are resets for each PHY lane. The PHY can be configured in hardware to read register settings from ROM, or they can be written by the driver. The sequence of operation on startup is to enable the APB bus, write the PHY registers (if required) for each lane group, and then enable the PHY. Each group of lanes can then be individually controlled using the power_on()/ power_off() function for that generic PHY One difference with the linux driver is that the PHY is always reset after it is powered-on. This is because role switching is not supported in u-boot and the cable orientation is handled by the PHY reset. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Alan Douglas <adouglas@cadence.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Link: https://lore.kernel.org/r/20210721155849.20994-8-kishon@ti.com
2021-07-27dm: core: Add helper to compare node namesKishon Vijay Abraham I1-0/+13
Add helper to compare node names. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org> Link: https://lore.kernel.org/r/20210721155849.20994-2-kishon@ti.com
2021-07-27mmc: sdhci_am654: Read ti, strobe-sel property from device treeAswath Govindraju1-0/+1
Read the strobe select value from the device tree property ti,strobe-sel, required for HS400 speed mode Fixes: a20008eabd95 ("mmc: am654_sdhci: Add Support for configuring PHY in J721e") Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Link: https://lore.kernel.org/r/20210525093826.10390-2-a-govindraju@ti.com
2021-07-27mmc: sdhci: Write to HOST_CONTROL2 register for HS400 speed modeFaiz Abbas1-0/+3
Enable HS400 speed mode by writing to HOST_CONTROL2 register. Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Link: https://lore.kernel.org/r/20210405144428.12159-1-a-govindraju@ti.com
2021-07-26psci: Do not define do_poweroff() if CONFIG_SYSRESET_CMD_POWEROFF is enabledMichal Simek1-1/+1
CONFIG_SYSRESET_CMD_POWEROFF defines do_poweroff() in sysreset-uclass.c that's why don't define it twice when both CONFIG_SYSRESET_CMD_POWEROFF and CONFIG_CMD_POWEROFF are enabled. CONFIG_SYSRESET_CMD_POWEROFF depends on CONFIG_CMD_POWEROFF. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26net: xilinx: axi_mrmac: Add MRMAC driverAshok Reddy Soma4-0/+777
Add support for xilinx multirate(MRMAC) ethernet driver. This driver uses multichannel DMA(MCDMA) for data transfers of MRMAC. Added support for 4 ports of MRMAC for speeds 10G and 25G. MCDMA supports upto 16 channels but in this driver we have setup only one channel which is enough. Tested 10G and 25G on all 4 ports. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26clk: zynqmp: Add support for enabling clock on lpd_lsbusMichal Simek1-0/+1
lpd_lsbus is clock which is used by many IPs like dmas, gems, gpio, sdhcis, spis, ttcs, uarts, watchdog that's why make sense to also enable access to change this clock. For this clock you already get the rate. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Make variables/structure staticMichal Simek1-6/+10
All these variables/structure are local and should be static. Issues are reported by sparse: drivers/mmc/zynq_sdhci.c:49:11: warning: symbol 'zynqmp_iclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:50:11: warning: symbol 'zynqmp_oclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:53:11: warning: symbol 'versal_iclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:54:11: warning: symbol 'versal_oclk_phases' was not declared. Should it be static? drivers/mmc/zynq_sdhci.c:546:24: warning: symbol 'arasan_ops' was not declared. Should it be static? Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-26mmc: zynq_sdhci: Fix kernel doc warningsMichal Simek1-12/+12
Fix these kernel doc warnings: drivers/mmc/zynq_sdhci.c:181: warning: contents before sections drivers/mmc/zynq_sdhci.c:236: warning: contents before sections drivers/mmc/zynq_sdhci.c:291: warning: contents before sections drivers/mmc/zynq_sdhci.c:297: warning: Function parameter or member 'degrees' not described in 'sdhci_versal_sdcardclk_set_phase' drivers/mmc/zynq_sdhci.c:354: warning: contents before sections drivers/mmc/zynq_sdhci.c:360: warning: Function parameter or member 'degrees' not described in 'sdhci_versal_sampleclk_set_phase' drivers/mmc/zynq_sdhci.c:467: warning: contents before sections Signed-off-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-26mmc: zynq_sdhci: Split set_tapdelay function to in and outAshok Reddy Soma1-2/+8
Split arasan_zynqmp_set_tapdelay() to handle input and output tapdelays separately. This is required to handle zero values for ITAP and OTAP values. If we dont split, we will have to remove the if() in the function, which makes ITAP values to be overwritten when OTAP values are called to set and vice-versa. Restrict tap_delay value calculated to max allowed 8 bits for ITAP and 6 bits for OTAP for ZynqMP. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Use Mask writes for Tap delaysAshok Reddy Soma1-27/+31
Restrict tap_delay value to the allowed size(8bits for itap and 6 bits for otap) before writing to the tap delay register. Clear ITAP and OTAP delay bits before updating with the new tap value for Versal platform. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Allow configuring zero Tap valuesAshok Reddy Soma1-12/+4
Allow configuring ITAP and OTAP values with zero to avoid failures in some cases (one of them is SD boot mode). Legacy, SDR12 modes require to program the ITAP and OTAP values as zero, whereas for SDR50 and SDR104 modes ITAP value is zero. In SD boot mode firmware configures the SD ITAP and OTAP values and in this case u-boot has to re-configure required tap values(including zero) based on the operating mode. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-26mmc: zynq_sdhci: Resolve uninitialized return valueAshok Reddy Soma1-12/+8
set_phase() functions are not modifying the ret value and returning the same uninitialized ret, return 0 instead. Keep the return type as int to return errors when the tapdelay's are set via xilinx_pm_request() in future. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-07-24serial: pl011: Enable DEBUG_UART_PL011 in SPLChen Baozi1-2/+6
Commit b81406db51a6 ("arm: serial: Add debug UART capability to the pl01x driver") add supports to use pl01x as a debug UART. However, due to CONFIG_IS_ENABLED macro requires CONFIG_SPL_* prefix, the _debug_uart_init() would not choose TYPE_PL011 in SPL build. This patch fixes the bug by judging CONFIG_DEBUG_UART_PL011 explicitly. Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-24reset: ast2600: Fix missing reference operatorChia-Wei Wang1-4/+4
Fix missing reference operator '&' to correctly get HW register addresses for writel(). Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com>
2021-07-24serial: pl011: Resend the character if FIFO is full in debug uartChen Baozi1-1/+2
pl01x_putc() might return -EAGAIN if there was no space in FIFO. In that case, high-level caller should wait until there is space and resend the character. Signed-off-by: Chen Baozi <chenbaozi@phytium.com.cn> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-24serial: serial_msm: Delay initialization to let pins stabilizeStephan Gerhold1-0/+4
For some reason, the DragonBoard 410c aborts autoboot immediately if U-Boot is started without LK. It looks like it picks up a single broken character via serial and therefore believes a key was pressed to abort autoboot. After some debugging, it seems like adding some delay after pinctrl setup but before UART initialization fixes the issue. It's also worth mentioning that unlike when booting from LK, the pinctrl setup is actually necessary when booting U-Boot without LK since UART is broken if the pinctrl line is removed. I suspect that reconfiguring the pins might take some time to stabilize and if the UART controller is enabled too quickly it will pick up some random noise. Adding a few milliseconds of delay fixes the issue and shouldn't have any other negative side effects. 3ms seems to be the minimum delay required in my tests, use 5ms instead just to be sure. Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
2021-07-24board: synquacer: Initialize SCBM SMMU at board_init()Masami Hiramatsu1-7/+0
Since the SCBM SMMU is not only connected to the NETSEC but also shared with the F_SDH30 (eMMC controller), that should be initialized at board level instead of NETSEC. Move the SMMU initialization code into board support and call it from board_init(). Without this fix, if the NETSEC is disabled, the Linux eMMC ADMA cause an error because SMMU is not initialized. Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org>
2021-07-23reboot-mode: read the boot mode from RTC memoryNandor Han3-0/+137
RTC devices could provide battery-backed memory that can be used for storing the reboot mode magic value. Add a new reboot-mode back-end that uses RTC to store the reboot-mode magic value. The driver also supports both endianness modes. Signed-off-by: Nandor Han <nandor.han@vaisala.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-23reboot-mode: read the boot mode from GPIOs statusNandor Han3-0/+138
A use case for controlling the boot mode is when the user wants to control the device boot by pushing a button without needing to go in user-space. Add a new backed for reboot mode where GPIOs are used to control the reboot-mode. The driver is able to scan a predefined list of GPIOs and return the magic value. Having the modes associated with the magic value generated based on the GPIO values, allows the reboot mode uclass to select the proper mode. Signed-off-by: Nandor Han <nandor.han@vaisala.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-23reboot-mode: add support for reboot mode controlNandor Han5-0/+162
A new driver uclass is created to handle the reboot mode control. The new uclass driver is updating an environment variable with the configured reboot mode. The mode is extracted from a map provided at initialization time. The map contains a list of modes and associated ids. Signed-off-by: Nandor Han <nandor.han@vaisala.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-23i2c: pcf8575: Add support for 8 bit I2C IO expanders (like pca8574)Lukasz Majewski1-21/+19
This patch add support for using NXP's pca8574 I2C IO expander, which has only 8 IO lines. After this change the .data member's information from struct udevice_id are used to either sent one or two bytes. Moreover, the '_le16' suffix from pcf8575_i2c_{write|read}_le16() functions have been removed as now we also sent 8 bit data. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-23i2c: pcf8575: Remove not used members of pcf8575_chip structureLukasz Majewski1-3/+0
Those members are not used anymore as ones from gpio_dev_priv structure (when DM_GPIO support is enabled) are used instead. Signed-off-by: Lukasz Majewski <lukma@denx.de> Reviewed-by: Heiko Schocher <hs@denx.de>
2021-07-23tee: optee: sync cache on pre-reloc OP-TEE invocationEtienne Carriere2-2/+38
This change ensures both U-Boot and OP-TEE see the same content from shared memory when OP-TEE is invoked prior U-Boot relocation. This change is required since U-Boot may execute with data cache off while OP-TEE always enables cache on memory shared with U-Boot. Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-07-23Merge branch 'network_master' of ↵Tom Rini7-146/+108
https://source.denx.de/u-boot/custodians/u-boot-net
2021-07-22net: fsl-mc: fix logically dead codeCosmin-Florin Aluchenesei1-2/+2
The result of dpio_close() is actually taken into account. Signed-off-by: Cosmin-Florin Aluchenesei <aluchenesei.cosmin-florin@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-22drivers: net: aquantia: fix unsigned compared against 0Cosmin-Florin Aluchenesei1-2/+3
Change the reg variable to not be unsigned so that we not get into an unsigned compared against 0. Signed-off-by: Cosmin-Florin Aluchenesei <aluchenesei.cosmin-florin@nxp.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-22net: dwc_eth_qos: define LOG_CATEGORYPatrick Delaunay1-0/+2
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-22net: eth-phy: define LOG_CATEGORYPatrick Delaunay1-0/+2
Define LOG_CATEGORY to allow filtering with log command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-22net: dwc: add a common empty ops eqos_null_opsPatrick Delaunay1-75/+22
Add a common empty ops: eqos_null_ops() to remove the duplicated empty functions and reduce the driver size for stm32 and imx config. This patch also aligns the prototype of ops 'eqos_stop_clks' with other eqos ops by adding return value. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-22net: dwc_eth_qos: use generic ethernet phy for stm32 variantPatrick Delaunay2-50/+1
Use the generic ethernet phy which already manages the correct binding for gpio reset, including the assert an deassert delays. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-22net: dwc_eth_qos: remove the field phyaddr of the struct eqos_privPatrick Delaunay1-5/+0
Since the commit commit 6a895d039ba7 ("net: Update eQos driver and FEC driver to use eth phy interfaces") the field phyaddr of driver private data struct eqos_priv is no more used in eqos_start() for the phy_connect() parameter. Now this variable is only initialized in eqos_probe_resources_stm32() it can be removed. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-22net: eth-phy: manage subnode mdio0Patrick Delaunay1-2/+8
Bind any subnode with name beginning by mdio, mdio0 for example, and not only the "mdio" as namei of subnode. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-22net: eth-phy: use dev_dbg and log_noticePatrick Delaunay1-9/+11
Replace debug trace and printf to log macros: - debug() replaced by dev_dbg() when device is available, this macro indicate the device name since commit ceb70bb870ac ("dm: Print device name in dev_xxx like Linux") - printf() replaced by log_notice() to allow dispatch to log backends. Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-07-22net: eth-phy: add support of device tree configuration for gpio resetPatrick Delaunay1-0/+56
The gpio reset and the assert or deassert delay are defined in generic binding of the ethernet phy in Linux: Documentation/devicetree/bindings/net/ethernet-phy.yaml reset-gpios: maxItems: 1 description: The GPIO phandle and specifier for the PHY reset signal. reset-assert-us: description: Delay after the reset was asserted in microseconds. If this property is missing the delay will be skipped. reset-deassert-us: description: Delay after the reset was deasserted in microseconds. If this property is missing the delay will be skipped. See also U-Boot: doc/device-tree-bindings/net/phy.txt This patch adds the parsing of this common DT properties in the u-class "eth_phy_generic", used by default in the associated driver "eth_phy_generic_drv" This parsing function eth_phy_of_to_plat can be reused by other ethernet phy drivers for this uclass UCLASS_ETH_PHY. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2021-07-22net: Use phys_addr_t for SMC net device addressesPeter Hoyes2-2/+2
Use same type as eth_device->iobase and support addresses greater than INT_MAX. Signed-off-by: Peter Hoyes <Peter.Hoyes@arm.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
2021-07-21dm: core: fix no null pointer detection in ofnode_get_addr_size_index()Chen Guanqiao1-3/+3
Fixed a defect of a null pointer being discovered by Coverity Scan: CID 331544: Null pointer dereferences (REVERSE_INULL) Null-checking "size" suggests that it may be null, but it has already been dereferenced on all paths leading to the check. Signed-off-by: Chen Guanqiao <chenguanqiao@kuaishou.com>
2021-07-21blk: Support iterationSimon Glass1-0/+49
It is useful to be able to iterate over block devices. Typically there are fixed and removable devices. For security reasons it is sometimes useful to ignore removable devices since they are under user control. Add iterators which support selecting the block-device type. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21sandbox: mmc: Support fixed MMC devicesSimon Glass1-3/+21
Add support for reading devicetree flags for MMC devices. With this we can distinguish between fixed and removable drives. Note that this information is only available when the device is probed, not when it is bound, since it is read in the of_to_plat() method. This could be changed if needed later. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-21cros_ec: Use standard calls for recovery-request checkingSimon Glass1-7/+11
Rather than calling directly into the sandbox SDL code, we can use the normal U-Boot console handling for this feature. Update the code, to make it more generic. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21cros_ec: Support the full-size vboot contextSimon Glass1-5/+3
The v2 format is 64-bytes in size. Support this and drop v1 since it is not used anymore. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21cros_ec: Drop cros_ec_entering_mode()Simon Glass2-14/+0
This function is not needed anymore. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21cros_ec: Allow reading the battery-charge stateSimon Glass1-0/+17
Add a function to read this information from the EC. It is useful for determining whether the battery has enough charge to boot. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21dm: Support lzma in the flashmapSimon Glass1-0/+2
Allow lzma compression as well as lz4. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21dm: core: Add logging for DM_SEQ_ALIASSimon Glass1-1/+3
It is sometimes helpful to see which sequence is assigned to a device. Add debugging info for that. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-07-21sysinfo: rcar3: Add Renesas R-Car Gen3 sysinfo driverMarek Vasut3-0/+205
The Renesas R-Car Gen3 development kits contain board ID EEPROM. This driver parses out the board ID and revision out of that EEPROM and exports it e.g. for the board-info print on boot. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Sean Anderson <sean.anderson@seco.com> Cc: Simon Glass <sjg@chromium.org>
2021-07-19Merge tag 'ti-v2021.10-rc1' of ↵Tom Rini12-6/+795
https://source.denx.de/u-boot/custodians/u-boot-ti - Enabled distro boot for all TI platforms. - Cleanup for AM335x Guardian Board - PRUSS rproc on AM65 platform. - Add PMIC support for J7200 - Misc fixes for Nokia RX-51 # Conflicts: # arch/arm/mach-omap2/am33xx/Kconfig
2021-07-19pci: Require DM_PCITom Rini4-983/+5
As the migration deadline has passed, require that DM_PCI be used. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-07-19usb: Enforce DM_USB migration for USB_HOST devices.Tom Rini9-25/+36
As the deadline for migration to DM_USB, when using a USB host controller has now gone two years past the deadline, enforce migration. This is done by: - Ensuring that all host controller options (other than the very legacy old MUSB ones) now select USB_HOST. USB_HOST now enforces DM_USB and OF_CONTROL. - Remove other parts of Kconfig logic that had platforms pick DM_USB. - To keep Kconfig happy, have some select statements test for USB_HOST as well. - Re-order some Kconfig entries and menus so that we can cleanly pick host or gadget roles. For the various HCD options that have platform glue options, group them together and update dependencies in some cases. - As SPL_DM_USB is not required, on platforms that had not yet enabled it, disable it. Cc: Marek Vasut <marex@denx.de> Cc: Icenowy Zheng <icenowy@aosc.io> Cc: Samuel Holland <samuel@sholland.org> Cc: FUKAUMI Naoki <naobsd@gmail.com> Cc: Andre Przywara <andre.przywara@arm.com> Cc: Jagan Teki <jagan@amarulasolutions.com> Signed-off-by: Tom Rini <trini@konsulko.com>