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2020-09-30net: mvneta: Fix not always calling dev_err with a deviceSean Anderson1-2/+2
No need for indirection here. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30net: bcm6368: Fix not calling dev_info with a deviceSean Anderson1-2/+1
Remove the pdev indirection. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30nand: vybrid: Re-introduce vf610_nfc.devSean Anderson1-17/+21
This member was presumably dropped when this driver was converted from Linux. However, it is still used in log statements during initialization. This patch adds the member back. In addition, allocation of struct vf610_nfc has been moved to the callers of vf610_nfc_nand_init. This allows it to be allocated by DM (if it is being used) and for dev to be initialized. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30nand: brcmnand: Fix not calling dev_err() with a deviceSean Anderson1-14/+6
There are too many levels of indirection when calling dev_err. This is an artifact of the conversion of brcmnand_host.pdev from a struct platform_device (which has a member `dev` pointing to a struct device) to struct udevice. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30nand: atmel: Fix not calling dev_xxx with a deviceSean Anderson1-30/+39
Use mtd_info to get a device to log with. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30mailbox: k3: Fix not calling dev_err with a deviceSean Anderson1-2/+4
dev needs to be gotten from mbox_chan Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30mmc: mtk-sd: Fix not calling dev_err with a deviceSean Anderson1-11/+13
This adds a udevice parameter to get_best_delay and msdc_set_mclk so they can call dev_err properly. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30mmc: bcm2835-host: Fix not calling dev_dbg with a deviceSean Anderson1-17/+17
dev needs to be qualified as a member of host. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30mtd: spi-nand: Fix not calling dev_err with a deviceSean Anderson1-4/+4
Get it from spinand->slave->dev. Another option would be to use spinand_to_mtd(spinand)->dev, but this is what the existing code uses. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30mtd: spi: Fix logging in spi-nor-tinySean Anderson1-5/+16
This fixes dev_xxx() not always being called with a device. In spi_nor_reg_read, a the slave device may not always be available, so we use bus and cs instead. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30mtd: spi: Include dm.h in spi-nor-core.cSean Anderson1-0/+1
This header is needed so struct udevice can be used in dev_xxx(). Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30mtd: nand: sunxi: Fix not calling dev_err with a deviceSean Anderson1-22/+23
Usually the device is gotten from sunxi_nfc. This is a struct device and not a struct udevice, but the whole driver seems to be written wihout DM anyway... In a few instances, this patch modifies functions to take an nfc to log with. In once instance we use mtd_info's device since there is no nfc. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30mtd: nand: pxa3xx: Fix not calling dev_xxx with a deviceSean Anderson1-15/+15
Use the device from any mtd already available, or from the active mtd via pxa3xx_nand_info if one is not. Signed-off-by: Sean Anderson <seanga2@gmail.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30i2c: mxc: Fix dev_err being called on a nonexistant variableSean Anderson1-2/+5
The udevice we are working with is called `bus` and not `dev`. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30firmware: ti_sci: Fix not calling dev_err with a deviceSean Anderson1-7/+16
This converts calls to dev_err to get the device from ti_sci_info where appropriate. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Nishanth Menon <nm@ti.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30dm: syscon: Fix calling dev_dbg with an uninitialized deviceSean Anderson1-1/+1
We can't use dev_dbg here because we haven't bound to the device yet. Use log_debug instead. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com> Tested-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-09-30riscv: clk: Add CLINT clock to kendryte clock driverSean Anderson1-0/+4
Another "virtual" clock (in the sense that it isn't configurable). This could possibly be done as a clock in the device tree, but I think this is a bit cleaner. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2020-09-30timer: Add a test for timer_timebase_fallbackSean Anderson2-8/+35
To test this function, sandbox CPU must set cpu_platdata.timebase_freq on bind. It also needs to expose a method to set the current cpu. I also make some most members of cpu_sandbox_ops static. On the timer side, the device tree property sandbox,timebase-frequency-fallback controls whether sandbox_timer_probe falls back to time_timebase_fallback or to SANDBOX_TIMER_RATE. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-09-30timer: Add helper for drivers using timebase fallbackSean Anderson1-0/+31
This function is designed to be used when a timer used to be initialized by the cpu (e.g. RISC-V timers), but now is initialized by dm_timer_init. In such a case, the timer may prefer to use the clocks and clock-frequency properties, but should be able to fall back on using the cpu's timebase-frequency. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-09-30riscv: Rework riscv timer driver to only support S-modeSean Anderson2-21/+22
The riscv-timer driver currently serves as a shim for several riscv timer drivers. This is not too desirable because it bypasses the usual timer selection via the driver model. There is no easy way to specify an alternate timing driver, or have the tick rate depend on the cpu's configured frequency. The timer drivers also do not have device structs, and so have to rely on storing parameters in gd_t. Lastly, there is no initialization call, so driver init is done in the same function which reads the time. This can result in confusing error messages. To a user, it looks like the driver failed when trying to read the time, whereas it may have failed while initializing. This patch removes the shim functionality from the riscv-timer driver, and has it instead implement the former rdtime.c timer driver. This is because existing u-boot users who pass in a device tree (e.g. qemu) do not create a timer device for S-mode u-boot. The existing behavior of creating the riscv-timer device in the riscv cpu driver must be kept. The actual reading of the CSRs has been redone in the style of Linux's get_cycles64. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-09-30ram: sifive: Remove regmap dependencyBin Meng1-9/+3
The usage of regmap API in the SiFive RAM driver is not correct. The reg address should be obtained via dev_read_addr_index() API. Signed-off-by: Bin Meng <bin.meng@windriver.com>
2020-09-30ram: sifive: Check return value on clk_enable()Bin Meng1-0/+5
The return value should be checked otherwise it's useless to assign the return value to 'ret'. Signed-off-by: Bin Meng <bin.meng@windriver.com>
2020-09-29video: typo NormllyHeinrich Schuchardt1-1/+1
%s/Normlly/Normally/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-29mtd: fix typos in drivers/mtd/Kconfig, drivers/mtd/renesas_rpc_hf.cHeinrich Schuchardt2-5/+5
Fix a typo %s/interract/interact/ Use Samsung's capitalization of their trademarks %s/onenand/OneNAND/ %s/Hyperflash/HyperFlash/ Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Stefan Roese <sr@denx.de> [trini: Add other Hyperflash cases as noted by Stefan] Signed-off-by: Tom Rini <trini@konsulko.com>
2020-09-28Merge tag 'u-boot-amlogic-20200928' of ↵Tom Rini1-1/+2
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - fix RNG driver probe & linux EFI KASLR boot on GXL, GXM, G12A, G12B & SM1 based boards
2020-09-28timer: mchp-pit64b: add support for pit64bClaudiu Beznea3-0/+117
Add support for Microchip PIT64B timer. The timer is 64 bit length and is used as a free running counter (in continuous mode with highest values for period registers). The clock feeding the timer would be no more than 12.5MHz. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2020-09-28rng: meson: make core clock optionalNeil Armstrong1-1/+2
This fixes HWRNG support on Amlogic GXL, GXM, G12A, G12B & SM1 based boards dues to the lack of the core clock in the device tree. It was reported breaking EFI boot in the Linux EFI stub, because the EFI_RNG_PROTOCOL didn't check for the RNG device presence before installing itself. The Linux amlogic,meson-rng.yaml doesn't mandate the core clock, this the clock should be ignores if not present. Nevertheless, the clock should be present and this should be fixed on the Linux meson-gxl.dtsi & meson-g12-common.dtsi then synced with U-Boot. The change has been tested on a Khadas VIM3, which uses the common meson-g12-common.dtsi like the Odroid-C4 & Odroid-N2 in Scott's report, along with the RNG cmd. Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Reported-by: Scott K Logan <logans@cottsay.net> Fixes: bc40eb278b ("drivers/rng: add Amlogic hardware RNG driver") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Scott K Logan <logans@cottsay.net> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-09-26net: ravb: Remove writeext function callBiju Das1-2/+0
The micrel phy driver is already configuring this values from device tree. So remove the redundant phy configuration call from this driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26pinctrl: renesas: Fix PINCTRL_PFC_R8A774A1 help descriptionBiju Das1-10/+10
R8A774A1 is part of Renesas RZ/G2 series and not R-Car, reflect the same for PINCTRL_PFC_R8A774A1 help description Alongside, sort the PINCTRL_PFC_R8A774A1 config option as per increasing number of the SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-25Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini7-26/+68
- Bug fixes related to PCIe, pfe, xfi, gpio, reset, vid, env, and usb on layerscape products
2020-09-25Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 ↵Tom Rini7-1/+326
into next - Enhance the 'zboot' command to be more like 'bootm' with sub-commands - The last series of ACPI core changes for programmatic generation of ACPI tables - Add all required ACPI tables for ApolloLake and enable ACPIGEN on Chromebook Coral - A feature minor enhancements to the 'hob' command - Intel edison: Support for writing an xFSTK image via binman
2020-09-25mmc: atmel-sdhci: use mmc_of_parse to get the DT propertiesEugen Hristev1-0/+4
Call mmc_of_parse at probe time to fetch all the host properties from the DT. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-09-25mmc: atmel-sdhci: enable the required generic clockEugen Hristev1-0/+4
The second clock of the IP block (the generic clock), must be explicitly enabled. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Peng Fan <pengfan@nxp.com>
2020-09-25mmc: atmel-sdhci: do not check clk_set_rate return valueEugen Hristev1-3/+1
clk_set_rate will return rate in case of success and zero in case of error, however it can also return -ev, but it's an ulong function. To avoid any issues, disregard the return value of this call. In case this call actually fails, nothing much we can do anyway, but we can at least try with the previous values (or DT assigned-clocks) Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-09-25mmc: atmel-sdhci: add sama7g5-sdhci compatibility stringEugen Hristev1-0/+1
Add new compatibility string for matching sama7g5 product. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-09-25pinctrl: at91-pio4: add compatible for sama7g5 pinctrl blockEugen Hristev1-0/+1
Add new compatible to microchip,sama7g5 new SoC. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-09-25tpm: cr50: Add ACPI supportSimon Glass1-0/+55
Generate ACPI information for this device so that Linux can use it correctly. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25x86: acpi: Add common Intel ACPI tablesSimon Glass1-0/+9
Add various tables that are common to Intel CPUs. These functions can be used by arch-specific CPU code. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25i2c: Add a generic driver to generate ACPI infoSimon Glass4-0/+261
Many I2C devices produce roughly the same ACPI data with just things like the GPIO/interrupt information being different. This can be handled by a generic driver along with some information in the device tree. Add a generic i2c driver for this purpose. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-09-25dm: acpi: Use correct GPIO polarity type in acpi_dp_add_gpio()Simon Glass1-1/+1
This function currently accepts the IRQ-polarity type. Fix it to use the GPIO type instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-24pci: layerscape: Fixup PCIe EP mode DT nodes for LX2160A rev2Hou Zhiqiang1-0/+26
LX2160A rev2 uses different PCIe controller, so EP mode DT nodes also need to be fixed up. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24net: pfe_eth: Remove non-DM code check from pfe_spi_flash_initKuldeep Singh1-11/+5
CONFIG_DM_SPI_FLASH is only supported now with passing of driver conversion deadline from non-DM to DM model. Hence, it's safe to remove non-DM code check from pfe_spi_flash_init. Also use CONFIG_ENV_SPI_MODE and CONFIG_ENV_SPI_MAX_HZ instead of reading reading values from DT. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24net: pfe_eth: Fix resoure leak in pfe_spi_flash_initKuldeep Singh1-0/+4
Fix Coverity issue: RESOURCE_LEAK. leaked_storage: Variable addr going out of scope leaks the storage it points to. Fixes: e0152dbed683 ("net: pfe_eth: Use spi_flash_read API to access flash memory") Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24driver: net: fm: add support for XFIMadalin Bucur1-1/+2
All the 10G ports that were working in XFI mode were described as using XGMII (as PHY_INTERFACE_MODE_XFI was not added at the time). Add the minimal changes required for the FMan code to support XFI. Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24ls1012a, pfe_eth: Update probe to avoid resource leakChaitanya Sakinam1-11/+6
PFE DDR addresses are now stored on to a stack varaiable rather dynamic allocation. Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24ls1012a, pfe_eth: correction in delay implementationChaitanya Sakinam1-2/+3
correction in delay implementation before we exit out of tx timeout. Signed-off-by: Chaitanya Sakinam <chaitanya.sakinam@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24drivers: net: phy: Use Aquantia driver for AQR113CMadalin Bucur1-0/+15
Add support for AQR113C PHY Signed-off-by: Madalin Bucur <madalin.bucur@oss.nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24drivers: net: ldpaa_eth: lx2160a: fix bug in checking if a DPMAC is enabledGrigore Popescu1-2/+2
The next DPMAC was always verified if it is enabled. In case of DPMAC@6, the DPMAC@7 is verified. As DPMAC@7 is disabled, DPMAC@6 will be considered disabled and not detected by uboot. Signed-off-by: Grigore Popescu <grigore.popescu@nxp.com> Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-09-24Merge tag 'xilinx-for-v2021.01' of ↵Tom Rini17-56/+106
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze into next Xilinx changes for v2021.01 arm64: - Support for bigger U-Boot images compiled with PIE microblaze: - Extend support for LE/BE systems zynqmp: - Refactor silicon ID detection code with using firmware interface - Add support for saving variables based on bootmode zynqmp-r5: - Fix MPU mapping and defconfig setting. xilinx: - Minor driver changes: names alignment - Enable UBIFS - Minor DT and macros fixes - Fix boot with appended DT - Fix distro boot cmd: - pxe: Add fixing for platforms with manual relocation support clk: - fixed_rate: Add DM flag to support early boot on r5 fpga: - zynqmppl: Use only firmware interface and enable SPL build serial: - uartlite: Enable for ARM systems and support endians mmc: - zynq: Fix indentation net: - gem: Support for multiple phys - emac: Fix 64bit support and enable it for arm64 kconfig: - Setup default values for Xilinx platforms - Fix dependecies for Xilinx drivers - Source board Kconfig only when platform is enabled - Fix FPGA Kconfig entry with SPL - Change some defconfig values bindings: - Add binding doc for vsc8531
2020-09-24net: tsec: Add the compatible string "gianfar" supportHou Zhiqiang1-2/+14
Add compatible string "gianfar" support and update the device-tree-bindings doc. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
generated by cgit v1.2.3 (git 2.39.0) at 2026-09-24 06:53:31 +0300