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2021-08-08dm: core: Don't allow uclass use before readySimon Glass1-0/+3
At present it is possible to call uclass_get() before driver model is inited. In fact this happens on x86 boards which use Intel FSPv1, since mrccache_get_region() tries to get the SPI flash device very early during init. This has always been undefined behaviour. Previously it generally worked, i.e. returned an error code without crashing, because gd->uclass_root_s is zeroed and the uclass can be added despite driver model not being ready, due to the way lists are implemented. With the change to use a gd->uclass_root pointer, this no-longer works. For example, it causes a hang on minnowmax. Fix this by adding a check that driver model is ready when uclass_get() is called. This function is called in the process of locating any device, so it is a good place to add the check. This fixes booting on minnowmax. Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: 8a715530bb1 ("dm: core: Allow the uclass list to move")
2021-08-08dm: migrate the dm_warn to use the log macroPatrick Delaunay1-11/+0
Migrate the dm_warn function to log macro with LOGC_DM category and LOGL_WARNING level. This macro allows filtering with log command and allows output on all log backend. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-06Merge tag 'video-2021-08-05' of ↵Tom Rini3-1/+154
https://source.denx.de/u-boot/custodians/u-boot-video - add display driver for ST-Ericsson MCDE - drop legacy CONFIG_VIDEO dependency for Hitachi tx18d42vm
2021-08-06pci: ppc: Drop ftpci100 driverSimon Glass2-320/+0
This is not used in U-Boot at present. Drop it and related config options. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06pci: sata_sil: Drop DM_PCI checksSimon Glass2-12/+0
We don't need these checks anymore since when PCI is enabled, driver model is always used. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06mmc: sdhci: Change prototype of set_delay to return errorsAshok Reddy Soma1-2/+8
set_delay() has return type as void. If there are any errors while setting tapdelay's it won't be able to return them. Change the prototype of set_delay() in sdhci_ops structure and return the errors from wherever it is called. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06mmc: zynq_sdhci: Return errors from arasan_sdhci_set_tapdelayAshok Reddy Soma1-5/+18
Change return type of arasan_sdhci_set_tapdelay() to int, to facilitate returning errors. Get return values from input and output set clock phase functions inside arasan_sdhci_set_tapdelay() and return those errors. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06reset: zynqmp: Add reset controller for ZynqMP SoCMichal Simek3-0/+110
Add firmware based reset controller for Xilinx ZynqMP SoC to let other drivers to call reset functions. Driver is only tested on Xilinx ZynqMP but support for Xilinx Versal can be simply added. That's why reset_id and nr_reset are assigned in probe folder. Driver is inpired by driver from Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06rtc: zynqmp: Add support for ZynqMP RTCMichal Simek3-0/+166
The whole driver logic is taken from Linux kernel but only set/get/reset functions are implemented. When device is power off RTC is power out of battery. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06dm: rtc: uclass: Add flag to control sequence numberingMichal Simek1-0/+1
RTCs are using aliases for sequences. That's why enable DM_UC_FLAG_SEQ_ALIAS for exact RTC indentification. The same flag is used by a lot of other uclasses like mmc, pci, serial, spi, timer, tpm, etc. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-08-06pci: Drop DM_PCI check from bios_emulSimon Glass2-137/+0
We don't need these checks anymore since when PCI is enabled, driver model is always used. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06pci: scsi: pci: Drop DM_PCI check from scsiSimon Glass1-6/+0
We don't need this check anymore since when PCI is enabled, driver model is always used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06pci: imx: Drop use of DM_PCISimon Glass1-81/+0
Now that DM_PCI is always enabled we don't need to check it. Drop this old code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06pci: msc01: Drop use of DM_PCISimon Glass1-64/+0
Now that DM_PCI is always enabled we don't need to check it. Drop this old code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06pci: gt64120: Drop use of DM_PCISimon Glass1-64/+0
Now that DM_PCI is always enabled we don't need to check it. Drop this old code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06pci: usb: ohci: Test on PCI not DM_PCISimon Glass1-1/+1
Now that DM_PCI is always enabled, check on CONFIG_PCI instead. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Update for non-PCI users of this code, reword] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-05pci: dm: core: Drop DM_PCI check from devfdt_get_addr_pci()Simon Glass1-2/+1
We don't need this check anymore since when PCI is enabled, driver model is always used. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-05pci: Drop DM_PCI check from pci_commonSimon Glass1-2/+2
We don't need this check anymore since when PCI is enabled, driver model is always used. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-03Merge https://source.denx.de/u-boot/custodians/u-boot-spiTom Rini3-10/+24
- SPI-NOR fix (Big Meng) - XMC XM25QH64C flash (Reto Schneider)
2021-08-03mtd: spi-nor: Mask out fast read if not requested in DTBin Meng1-3/+13
The DT bindings of "jedec,spi-nor" [1] defines "m25p,fast-read" property to indicate that "fast read" opcode can be used to read data from the chip instead of the usual "read" opcode. If this property is not present in DT, mask out fast read in spi_nor_init_params(). This change mirrors the same logic in spi_nor_info_init_params() in drivers/mtd/spi-nor/core.c in the Linux kernel v5.14-rc3. [1] Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml in the kernel tree Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-08-03mtd: spi-nor: Respect flash's hwcaps in spi_nor_adjust_hwcaps()Bin Meng1-3/+4
The smart spi_nor_adjust_hwcaps() does not respect the SPI flash's hwcaps, and only looks to the controller on what can be supported. The flash's hwcaps needs to be AND'ed before checking. Fixes: 71025f013ccb ("mtd: spi-nor-core: Rework hwcaps selection") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-08-03spi: spi-mem-nodm: Fix read data size issueBin Meng1-4/+6
When slave drivers don't set the max_read_size, the spi-mem should directly use data.nbytes and not limit to any size. But current logic will limit to the max_write_size. This commit mirrors the same changes in the dm version done in commit 535b1fdb8e5e ("spi: spi-mem: Fix read data size issue"). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-08-03mtd: spi-nor-ids: Add support for XMC XM25QH64CReto Schneider1-0/+1
This chip has been (briefly) tested on the MediaTek MT7688 based GARDENA smart gateway. Datasheet: http://xmcwh.com/Uploads/2020-12-17/XM25QH64C_Ver1.1.pdf Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-08-03Merge https://source.denx.de/u-boot/custodians/u-boot-x86Tom Rini3-8/+11
- Fixed broken ICH SPI driver in software sequencer mode - Added "m25p,fast-read" to SPI flash node for x86 boards - Drop ROM_NEEDS_BLOBS and BUILD_ROM for x86 ROM builds - Define a default TSC timer frequency for all x86 boards - x86 MTRR MSR programming codes bug fixes - x86 "hob" command bug fixes - Don't program MTRR for DRAM for FSP1 - Move INIT_PHASE_END_FIRMWARE to FSP2 - Use external graphics card by default on Intel Crown Bay - tangier: Fix DMA controller IRQ polarity in CSRT
2021-08-02global: Convert simple_strtoul() with decimal to dectoul()Simon Glass24-39/+38
It is a pain to have to specify the value 10 in each call. Add a new dectoul() function and update the code to use it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02global: Convert simple_strtoul() with hex to hextoul()Simon Glass19-43/+42
It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02Merge tag 'efi-2021-10-rc2' of ↵Tom Rini1-14/+12
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2021-10-rc2 Documentation: * handle 'make htmldocs' warnings as errors * add missing board/ti/index.rst Bug fixes: * avoid buffer overrun in TrueType console * lib: disable CONFIG_SPL_HEXDUMP by default
2021-08-02Merge tag 'mmc-2021-7-30' of https://source.denx.de/u-boot/custodians/u-boot-mmcTom Rini3-29/+38
pl180_mmci update and cleanup fix rpmb routing memory alignment
2021-08-02x86: tsc: Rename X86_TSC_TIMER_EARLY_FREQ to X86_TSC_TIMER_FREQBin Meng2-6/+7
Currently there are two places to specify the x86 TSC timer frequency with one in Kconfig used for early timer and the other one in device tree used when the frequency cannot be determined from hardware. This may potentially create an inconsistent config where the 2 values do not match. Let's use the one specified in Kconfig in the device tree as well. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-02spi: ich: Limit slave->max_read_sizeBin Meng1-2/+4
Since commit 43c145b8b3ee ("spi: ich: Correct max-size bug in ich_spi_adjust_size()") (in v2020.04-rc1), SPI flash read no longer works with ICH SPI controller in software sequencer mode. ICH controller can only transfer a small number of bytes at once. Before commit 43c145b8b3ee, the logic happens to make sure data.nbytes is limited to slave->max_write_size but after commit 43c145b8b3ee data.nbytes is no longer limited because slave->max_read_size is not initialized with a valid number. Fixes: 43c145b8b3ee ("spi: ich: Correct max-size bug in ich_spi_adjust_size()") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-01video: Hitachi panel: Drop bogus dependency on CONFIG_VIDEOAndre Przywara1-1/+0
The Hitachi tx18d42vm LCD panel driver is really just initialising the device, using bitbanged SPI, during operation there is nothing to do. This makes the driver self contained, so drop the bogus dependency on the legacy CONFIG_VIDEO. This avoids the warning when building Chuwi_V7_CW0825_defconfig, since we switched to DM_VIDEO recently. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-08-01video: Add simple driver for ST-Ericsson MCDE with pre-configured displayStephan Gerhold3-0/+154
The U-Boot port for ST-Ericsson Ux500 is currently only used on the "stemmy" board, where U-Boot runs after firmware that already sets up a boot splash screen. This means that the display is already on and we can just continue using it for U-Boot. Add a simple driver that simplifies this by reading the display configuration (e.g. screen size, bpp) from the hardware registers. It also checks the configured "source synchronization" - for some displays (usually DSI command mode displays) we need to explicitly trigger a software sync. This is done through the video_sync() callback that triggers the sync and wait for completion. Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-01sandbox: tpm: Support extending a PCR multiple timesSimon Glass1-14/+10
It is fairly easy to handle this case and it makes the emulator more useful, since PCRs are commonly extended several times. Add support for this, using U-Boot's sha256 support. For now sandbox only supports a single PCR, but that is enough for the tests that currently exist. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-01sandbox: tpm: Correct handling of SANDBOX_TPM_PCR_NBSimon Glass1-11/+11
This is the number of PCRs, so the current check is off by one. Also the map itself should not be checked, just the resulting pcr_index, to avoid confusing people who read the code. Fix these problems. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-01sandbox: tpm: Support storing device state in tpm2Simon Glass1-0/+139
At present the tpm2 emulator does not support storing the device state. Add this so we can handle the normal vboot flow through the sandbox executables (VPL->SPL etc.) with the TPM contents staying in place. Note: sandbox has not yet been converted to use livetree for the state information, since livetree does not yet support writing to the tree. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-01sandbox: tpm: Support nvdata in TPM2Simon Glass1-0/+68
Add support for this feature in the TPM2 emulator, to support Chromium OS vboot. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-01sandbox: tpm: Track whether the state is validSimon Glass1-2/+8
Add checking as to whether the current TPM state is valid, so we can implement reading/writing the state. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-01sandbox: tpm: Finish comments for struct sandbox_tpm2Simon Glass1-4/+16
Tidy up the missing comments for this struct. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-01sandbox: tpm: Correct handling of get-capabilitySimon Glass1-10/+4
This function current handles the kernel case incorrectly. Fix it, and use the shorter TPM_HDR_LEN while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-01sandbox: tpm: Support the define-space commandSimon Glass3-0/+34
Add support for this command, moving away from the previous approach of hard-coding the initial data in the driver, now that the kernel-space data has to be set up by the higher-level vboot code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-01sandbox: tpm: Tidy up reading and writing of device stateSimon Glass1-11/+24
At present this code assumes that the TPM data has been read but this may not be the case. Refactor the code to use a separate pointer so we know the current state of the data. Add error checking for the data size. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-01sandbox: tpm: Split out common nvdata codeSimon Glass4-105/+172
We want to support nvdata in TPM2 as well. To avoid code duplicating the associated code, move it into a common file. Drop the special-case logic for the kernel space. This can be handled by the higher-level code now, i.e. in vboot itself. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-01video: buffer overrun in TrueType consoleHeinrich Schuchardt1-14/+12
When scrolling the TrueType console a buffer overrun occurs. Fixes: a29b012037cc ("video: Add a console driver that uses TrueType fonts") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-07-31serial: a37xx: Do not call get_ref_clk() in _debug_uart_init()Pali Rohár1-1/+3
Static inline function _debug_uart_init() should avoid calling external (non-inline) functions. Therefore do not call get_ref_clk() in _debug_uart_init() and reimplement its functionality without external function calls. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-31serial: a37xx: Use CONFIG_BAUDRATE for initializing early debug UARTPali Rohár1-3/+2
CONFIG_BAUDRATE should be used for setting the baudrate for the early debug UART. This replaces current hardcoded 115200 value. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behun <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-31arm64: a37xx: pinctrl: Correct PWM pins definitionsMarek Behún1-9/+8
The PWM pins on North Bridge on Armada 37xx can be configured into PWM or GPIO functions. When in PWM function, each pin can also be configured to drive low on 0 and tri-state on 1 (LED mode). The current definitions handle this by declaring two pin groups for each pin: - group "pwmN" with functions "pwm" and "gpio" - group "ledN_od" ("od" for open drain) with functions "led" and "gpio" This is semantically incorrect. The correct definition for each pin should be one group with three functions: "pwm", "led" and "gpio". Change the "pwmN" groups to support "led" function. Remove "ledN_od" groups. This cannot break backwards compatibility with older device trees: no device tree uses it since there is no PWM driver for this SOC yet. Also "ledN_od" groups are not even documented. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-30mmc: arm_pl180_mmci: Add configuration for ST-Ericsson Ux500v2Stephan Gerhold2-7/+16
For the eMMC on ST-Ericsson Ux500v2 we need slightly different configuration values. Use the existing switch statement to match the peripheral ID of Ux500v2 (0x10480180) and override the necessary values to make the eMMC work on devices with ST-Ericsson Ux500. Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com> on stm32f769-disco Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-30mmc: arm_pl180_mmci: Simplify code using mmc_of_parse()Stephan Gerhold1-15/+4
Simplify the code a bit by using the common mmc_of_parse() function instead of duplicating the device tree parsing code. We can still get a default value for cfg->f_max by assigning it before calling mmc_of_parse(). Another advantage of this refactoring is that we parse more properties now, e.g. "non-removable" can be used to disable CD entirely. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com> on stm32f769-disco Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-30mmc: arm_pl180_mmci: Simplify code using dev_read_addr_ptr()Stephan Gerhold1-5/+2
Simplify the code a bit by using dev_read_addr_ptr() instead of dev_read_addr(). This avoids having to cast explicitly to void*. Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com> on stm32f769-disco Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-07-30mmc: arm_pl180_mmci: Don't bind to all arm, primecell devicesStephan Gerhold1-1/+1
The arm,primecell compatible is used for lots of different types of devices, e.g. I2C, SPI, coresight, ... We really should not bind the MMC driver to all of them. Looking through the device trees in U-Boot there seems to be always a second compatible string for the pl180 device, either arm,pl180 (already listed) or arm,pl18x. Add the "arm,pl18x" compatible to the list but remove the generic "arm,primecell". Note that on Linux these compatibles cannot be found in drivers because AMBA/primecell devices are matched based on their peripheral ID instead of the compatible. This fixes the following error messages when booting the ST-Ericsson U8500 "stemmy" board with the arm_pl180_mmci driver enabled: MMC: ptm@801ae000 - probe failed: -38 ptm@801af000 - probe failed: -38 funnel@801a6000 - probe failed: -38 tpiu@80190000 - probe failed: -38 etb@801a4000 - probe failed: -38 Cc: Patrice Chotard <patrice.chotard@st.com> Fixes: 6f41d1a17e20 ("mmc: arm_pl180_mmci: Sync compatible with kernel") Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com> on stm32f769-disco Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>