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2020-06-01Merge tag 'u-boot-rockchip-20200531' of ↵Tom Rini7-244/+147
https://gitlab.denx.de/u-boot/custodians/u-boot-rockchip - Fix mmc of path after syncfrom kernel dts; - Add dwc3 host support with DM for rk3399; - Add usb2phy and typec phy for rockchip platform; - Migrate board list doc to rockchip.rst; - Add rk3399 Pinebook Pro board support; - Update dram_init in board_init and add memory node in SPL;
2020-05-30driver: usb: drop legacy rockchip xhci driverFrank Wang3-207/+0
We have changed to use dwc3 generic driver for usb3.0 host, so the legacy Rockchip's xHCI driver is not needed, and drop it. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-30usb: dwc3: add make compatible for rockchip platformFrank Wang1-6/+28
RK3399 Type-C PHY is required that must hold whole USB3.0 OTG controller in resetting to hold pipe power state in P2 before initializing the PHY. This commit fixed it and added device compatible for rockchip platform. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29usb: ehci-mx6: Print error code on failureMarek Vasut1-2/+2
Print the error code if the regulator enable fails, otherwise the error message is rather useless and confusing. Signed-off-by: Marek Vasut <marex@denx.de>
2020-05-29usb: ehci-mx6: Handle fixed regulators correctlyMarek Vasut1-2/+2
The regulator-fixed would return -ENOSYS when enabled/disabled, because this operation is not supported, but this is not an error e.g. on systems where the VBUS cannot be controlled, so if this is the error code reported by the regulator core, consider it a success and continue. Signed-off-by: Marek Vasut <marex@denx.de>
2020-05-29eth/r8152: fix assigning the wrong endpointHayes Wang1-6/+8
Although I think it never occurs, the code doesn't make sense, because it may allow to assign an IN endpoint to ss->ep_out. Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-05-29usb: dwc3: amend UTMI/UTMIW phy interface setupFrank Wang3-31/+64
Let move 8/16-bit UTMI+ interface initialization into DWC3 core init that is convenient for both DM_USB and u-boot traditional process. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29usb: dwc3: Enable AutoRetry feature in the controllerJagan Teki2-0/+12
By default when core sees any transaction error (CRC or overflow) it replies with terminating retry ACK (Retry=1 and Nump == 0). Enabling this Auto Retry feature in controller will make the core send a non-terminanting ACK upon such transaction errors. That is, ACK TP with Retry=1 and Nump != 0. Doing so will give controller a chance to recover from transient error conditions. Reference from below Linux commit, commit <b138e23d3dff> ("usb: dwc3: core: Enable AutoRetry feature in the controller") Cc: Marek Vasut <marex@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29usb: dwc3: Add disable u2mac linestate check quirkJagan Teki2-0/+27
This patch adds a quirk to disable USB 2.0 MAC linestate check during HS transmit. Refer the dwc3 databook, we can use it for some special platforms if the linestate not reflect the expected line state(J) during transmission. When use this quirk, the controller implements a fixed 40-bit TxEndDelay after the packet is given on UTMI and ignores the linestate during the transmit of a token (during token-to-token and token-to-data IPGAP). On some rockchip platforms (e.g. rk3399), it requires to disable the u2mac linestate check to decrease the SSPLIT token to SETUP token inter-packet delay from 566ns to 466ns, and fix the issue that FS/LS devices not recognized if inserted through USB 3.0 HUB. Reference from below Linux commit, commit <65db7a0c9816> ("usb: dwc3: add disable u2mac linestate check quirk") Cc: Marek Vasut <marex@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2020-05-29usb: dwc3: add dis_u2_freeclk_exists_quirkFrank Wang2-0/+8
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit, which specifies whether the USB2.0 PHY provides a free-running PHY clock, which is active when the clock control input is active. Refer to commit 27f83eeb6b42("usb: dwc3: add dis_u2_freeclk_exists_quirk") in Linux Rockchip Kernel. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-29usb: dwc3: add dis_enblslpm_quirkFrank Wang2-0/+8
Add a quirk to clear the GUSB2PHYCFG.ENBLSLPM bit, which controls whether the PHY receives the suspend signal from the controller. Refer to commit ec791d149bca("usb: dwc3: Add dis_enblslpm_quirk") in Linux Kernel. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com> Tested-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-22eth/r8152: fix typo in register nameHayes Wang2-6/+6
The PAL_BDC_CR should be PLA_BDC_CR. Signed-off-by: Hayes Wang <hayeswang@realtek.com>
2020-05-22usb: dwc3: fix NULL pointer issueChunfeng Yun1-3/+3
The phy_bulk pointer *usb_phys is used before allocated, fix it by using a phy_bulk variable instead in xhci_dwc3_platdata struct Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
2020-05-22usb: ehci-omap: Add Support for DM_USB and OF_CONTROLAdam Ford1-3/+120
The omap3.dtsi file shows the usbhshost node with two sub-nodes for ohci and ehci. This patch file creates the usbhshost, and pulls the portX-mode information. It then locates the EHCI sub-node, and initializes the EHCI controller with the info pulled from the usbhshost node. There is still more to do since there isn't an actual link between the 'phys' reference and the corresponding phy driver, and there is no nop-xceiv driver yet. In the meantime, the older style reference to CONFIG_OMAP_EHCI_PHYx_RESET_GPIO is still needed to pull the phy out of reset until the phy driver is completed and the phandle reference is made. Signed-off-by: Adam Ford <aford173@gmail.com>
2020-05-19common: Drop linux/bitops.h from common headerSimon Glass24-0/+24
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop linux/delay.h from common headerSimon Glass60-0/+60
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop linux/bug.h from common headerSimon Glass16-0/+16
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop log.h from common headerSimon Glass78-0/+78
Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19command: Remove the cmd_tbl_t typedefSimon Glass2-0/+2
We should not use typedefs in U-Boot. They cannot be used as forward declarations which means that header files must include the full header to access them. Drop the typedef and rename the struct to remove the _s suffix which is now not useful. This requires quite a few header-file additions. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop init.h from common headerSimon Glass4-0/+4
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop part.h from common headerSimon Glass2-0/+2
Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-19common: Drop net.h from common headerSimon Glass12-0/+13
Move this header out of the common header. Network support is used in quite a few places but it still does not warrant blanket inclusion. Note that this net.h header itself has quite a lot in it. It could be split into the driver-mode support, functions, structures, checksumming, etc. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-18arm: Don't include common.h in header filesSimon Glass1-0/+7
It is bad practice to include common.h in other header files since it can bring in any number of superfluous definitions. It implies that some C files don't include it and thus may be missing CONFIG options that are set up by that file. The C files should include these themselves. Update some header files in arch/arm to drop this. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-05-15rename symbol: CONFIG_TEGRA -> CONFIG_ARCH_TEGRATrevor Woerner1-1/+1
Have this symbol follow the pattern of all other such symbols. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15rename symbol: CONFIG_KIRKWOOD -> CONFIG_ARCH_KIRKWOODTrevor Woerner2-2/+2
Have this symbol follow the pattern of all other such symbols. This patch also removes a TODO from the code. Reviewed-by: Chris Packham <judge.packham@gmail.com> Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-15rename symbol: CONFIG_ORION5X -> CONFIG_ARCH_ORION5XTrevor Woerner2-2/+2
Have this symbol follow the pattern of all other such symbols. This patch removes a TODO from the code. Signed-off-by: Trevor Woerner <twoerner@gmail.com>
2020-05-14usb: gadget: g_dnl: add function g_dnl_set_productPatrick Delaunay1-0/+8
Add a function g_dnl_set_product to change the Product string used in USB enumeration in any command based on download gadget. If the function is called with NULL pointer, the product string is set to the default value (product[] = "USB download gadget"). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reviewed-by: Patrice Chotard <patrice.chotard@st.com>
2020-05-12usb: dwc3: Add versal compatibility string to dwc3 glue idsSiva Durga Prasad Paladugu1-0/+1
Xilinx Versal platform uses dwc3 and hence its compatible string needs to be added to dwc3 glue ids. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-05-12usb: dwc3: add dis_del_phy_power_chg_quirkJagan Teki2-0/+7
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit, which specifies whether disable delay PHY power change from P0 to P1/P2/P3 when link state changing from U0 to U1/U2/U3 respectively. Reference from below Linux commit, commit <00fe081dc3a3> ("usb: dwc3: add dis_del_phy_power_chg_quirk") Cc: Marek Vasut <marex@denx.de> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-10usb: mx6: add fuse checkPeng Fan1-0/+16
Add fuse check for USB. If the fuse indicates the module will not work in the SoC, let's fail the initialization. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-10Merge branch 'master' of git://git.denx.de/u-bootStefano Babic8-155/+359
2020-05-03usb: gadget: sdp: use CONFIG_SDP_LOADADDR as default load addressFrank Li2-2/+6
If SDP_WRITE and SDP_JUMP addr is zero, use CONFIG_SDP_LOADADDR as default address Signed-off-by: Frank Li <Frank.Li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-05-02xhci: mediatek: Add support for MTK xHCI host controllerChunfeng Yun4-0/+320
This patch is used to support the on-chip xHCI controller on MediaTek SoCs, currently control/bulk/interrupt transfers are supported. Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2020-05-02usb: dwc2_udc_otg: use the phy bulk API to get physChunfeng Yun1-76/+17
Use the phy bulk API to get a group of phys Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2020-05-02usb: dwc3: use the phy bulk API to get physChunfeng Yun3-79/+22
Get a group of phys by the phy bulk API Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2020-04-28Merge tag 'u-boot-amlogic-20200428' of ↵Tom Rini1-0/+16
https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic - fix sd-emmc controller A init on G12A/G12B/SM1 SoCs - add GXBB USB PHY driver - enable access to SPI NOR Flash on VIM2 and VIM3/VIM3L boards - fix USB PHYs Power-Up on on VIM3/VIM3L boards
2020-04-28usb: host: dwc3-sti-glue: Use UCLASS_NOP instead of UCLASS_MISCPatrice Chotard1-1/+1
dwc3-sti-glue has been broken since MISC uclass has been modified to scan DT sub-nodes after bind. Fixing it by a using the no-op uclass. Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
2020-04-28usb: host: dwc2: add trace to have clean usb startPatrick Delaunay1-0/+2
Solve issue for the display of "usb start" command on stm32mp1 because one carriage return is missing in DWC2 probe. Before the patch: STM32MP> usb start starting USB... Bus usb-otg@49000000: Bus usbh-ehci@5800d000: USB EHCI 1.00 after the patch: STM32MP> usb start starting USB... Bus usb-otg@49000000: USB DWC2 Bus usbh-ehci@5800d000: USB EHCI 1.00 Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28usb: host: dwc2: force reset assertPatrick Delaunay1-0/+2
Assert reset before deassert in dwc2_reset; this patch solve issues when the DWC2 registers are already initialized with value incompatible with host mode. Force a hardware reset of the IP reset all the DWC2 registers at default value, the host driver start with a clean state (Core Soft reset doen in dwc_otg_core_reset is not enought to reset all register). The error can occurs in U-Boot when DWC2 device gadget driver force device mode (called by ums or dfu command, before to execute the usb start command). Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28usb: host: dwc2: add clk supportPatrick Delaunay1-1/+29
Add support for clock with driver model. This patch don't added dependency because when CONFIG_CLK is not activated the clk function are stubbed. Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28usb: host: dwc2: add phy supportPatrick Delaunay1-0/+66
Use generic phy to initialize the PHY associated to the DWC2 device and available in the device tree. This patch don't added dependency because when CONFIG_PHY is not activated, the generic PHY function are stubbed. Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-04-28usb: ether: avoid NULL check before free()Heinrich Schuchardt1-2/+1
free() checks if its argument is NULL. Do not duplicate this check. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-28usb: avoid NULL check before freeHeinrich Schuchardt1-6/+3
The free() function checks if the argument is NULL. Do not duplicate this check. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-04-28usb: dwc3-meson-g12a: add power-on/off of the PHYsNeil Armstrong1-0/+16
Power on/off the PHYs to enable power to the USB ports, fixing USB support on Khadas VIM3/VIM3L boards. The G12A USB complex has at least 2 USB2 PHYs, but one is muxed between the DWC2 and DWC3 controller and the other one directly connected to the DWC3 controller. The USB3+PCIe combo PHY is muxed between the DWC3 controller and a DW-PCIE controller. All PHYs are optional, but it's type (usb2/usb3) and position are important to determine it's capabilities, thus they are stored in a fixed size array and the phy-name determines it's position, it's position determining it's type and functionnalities. This is why we need to loop over the array to power on all the DT provided PHYs. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Marek Vasut <marex@denx.de>
2020-04-13drivers: usb: host: Add BRCM xHCI driverRayagonda Kokatanur3-0/+107
Base driver for Broadcom xHCI controllers Signed-off-by: Bharat Kumar Reddy Gooty <bharat.gooty@broadcom.com> Signed-off-by: Rayagonda Kokatanur <rayagonda.kokatanur@broadcom.com> Signed-off-by: Vladimir Olovyannikov <vladimir.olovyannikov@broadcom.com>
2020-04-13usb: Migrate to support live DT for some driverKever Yang10-53/+36
Use ofnode_ instead of fdt_ APIs so that the drivers can support live DT. This patch updates usb_get_dr_mode() and usb_get_maximum_speed() to use ofnode as parameter instead of fdt offset. And all the drivers who use these APIs update to use live dt APIs at the same time. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-13usb: ehci-msm: Use dev interface to get device addressKever Yang1-3/+1
Use dev_read_addr_ptr() instead of devfdt_get_addr() so that we can support live DT. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2020-04-13usb: dwc3-of-simple: Drop redundant inclding header fileKever Yang1-1/+0
The fdtdec.h is no use in this file, remove the include code. Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
2020-04-09usb: Keep async schedule running only across mass storage xfersMarek Vasut3-14/+89
Rather than keeping the asynchronous schedule running always, keep it running only across USB mass storage transfers for now, as it seems that keeping it running all the time interferes with certain control transfers during device enumeration. Note that running the async schedule all the time should not be an issue, especially on EHCI HCD, as that one implements most of the transfers using async schedule. Note that we have usb_disable_asynch(), which however is utterly broken. The usb_disable_asynch() blocks the USB core from doing async transfers by setting a global flag. The async schedule should however be disabled per USB controller. Moreover, setting a global flag does not prevent the controller from using the async schedule, which e.g. the EHCI HCD does. This patch implements additional callback to the controller, which permits it to lock the async schedule and keep it running across multiple transfers. Once the schedule is unlocked, it must also be disabled. This thus prevents the async schedule from running outside of the USB mass storage transfers. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Lukasz Majewski <lukma@denx.de> Cc: Tom Rini <trini@konsulko.com> Tested-by: Tom Rini <trini@konsulko.com> [omap3_beagle, previously failing]
2020-03-18sunxi: Move common defconfig options to KconfigAndre Przywara1-0/+1
Some config symbols are found in *almost* every _defconfig file for Allwinner boards, because those options are actually a platform choice, and not a per-board decision. Some of these options are older, some have recently been added. Move those options to be set for all Allwinner boards in their respective Kconfig files. The rationales are as follows: - NR_DRAM_BANKS: All Allwinner SoC map DRAM at one contiguous region of address space only, starting at 1 GB. So it's always one bank. - SPL_{DOS,EFI}_PARTITION: The Allwinner SPL does only support raw MMC accesses, we don't care about filesystems or partitions in there, so there is no need to define those symbols at all. - USE_PREBOOT: We start USB early when a keyboard is configured, using the preboot env variable, so we need to set this variable. - SYS_RELOC_GD_ENV_ADDR: We don't specify any ENV_ADDR, so need this symbol to be set (according to 8d8ee47e03e). - SYS_USB_EVENT_POLL_VIA_INT_QUEUE: According to commit eab9433aa55428, specifying this reduces the latency of the USB keyboard handling, so this was formerly enabled in config headers for all Allwinner boards. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Tested-by: Jagan Teki <jagan@amarulasolutions.com> # Amarula A64-Relic Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-10-01 21:43:27 +0300