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2019-04-21phy: usbphyc: Binding update of vdda supplyPatrick Delaunay1-2/+2
Move supply vdda1v1 and vdda1v8 in usbphyc node and no more in port Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-04-18ARC: dwmmc: Adding DesignWare MMC driver support for ARC devboardsEugeniy Paltsev1-0/+33
Add the DM_MMC-compatible DesignWare MMC driver support for Synopsys ARC devboards. It is created to switch ARC devboards to use DM_MMC. It required information such as clocks (Bus Interface Unit clock, Card Interface Unit clock) and SDIO bus width. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-04-14Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini3-3/+3
Conflicts: arch/arm/dts/armada-385-amc.dts arch/arm/dts/armada-xp-theadorable.dts arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi Signed-off-by: Tom Rini <trini@konsulko.com>
2019-04-12Merge tag 'u-boot-stm32-20190412' of https://github.com/patrickdelaunay/u-bootTom Rini1-0/+59
stm32 patches for v2019.07-rc1 - Add trusted boot with TF-A for stm32mp1 - stm32mp1 dts files sync'ed with Linux version - add STM32MP1 Discovery boards (DK1 and DK2) - add STMFX gpio expander driver - misc improvement for stm3mp1 supports - rename stpmu1 to stpmic1 (official name) - stm32_qspi: move to exec_op (spi nor driver for stm32 mpu and mcu) - add STM32 FMC2 NAND flash controller driver
2019-04-12dt-bindings: mtd: stm32_fmc2: add STM32 FMC2 NAND controller documentationChristophe Kerello1-0/+59
This patch adds the documentation of the device tree bindings for the STM32 FMC2 NAND controller. Signed-off-by: Christophe Kerello <christophe.kerello@st.com> Reviewed-by: Patrick DELAUNAY <patrick.delaunay@st.com>
2019-04-12doc: device-tree-bindings: switch from spi-flash to jedec, spi-norNeil Armstrong3-3/+3
Since all DTS files has been switched to "jedec,spi-nor", remove the "spi-flash" compatible from the bindings examples. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Patrick Delaunay <Patrick.delaunay@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
2019-04-11DM: I2C: Introduce 'u-boot, i2c-transaction-bytes' propertyLukasz Majewski1-0/+5
The 'u-boot,i2c-transaction-bytes' device tree property provides information regarding number of bytes transferred by a device in a single transaction. This change is necessary to avoid hanging devices after soft reset. One notable example is communication with MC34708 device: 1. Reset when communicating with MC34708 via I2C. 2. The u-boot (after reboot -f) tries to setup the I2C and then calls force_idle_bus. In the same time MC34708 still has some data to be sent (as it transfers data in 24 bits chunks). 3. The force_idle_bus() is not able to make the bus idle as 8 SCL clocks may be not enough to have the full transmission. 4. We end up with I2C inconsistency with MC34708. This PMIC device requires 24+ SCL cycles to make finish any pending I2C transmission. Signed-off-by: Lukasz Majewski <lukma@denx.de>
2019-03-11regulator: Add support for ramp delayKrzysztof Kozlowski1-0/+2
Changing voltage and enabling regulator might require delays so the regulator stabilizes at expected level. Add support for "regulator-ramp-delay" binding which can introduce required time to both enabling the regulator and to changing the voltage. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2019-02-28doc: binding: rename directory ram to memory-controllerPatrick Delaunay3-0/+0
Alignment with kernel directory name as it have already bindings for DDR controllers in the directory: Documentation/devicetree/bindings/memory-controller PS: the drivers using RAM u-class should be associated with this binding directory Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-02-27clk: Add fixed-factor clock driverAnup Patel1-0/+24
This patch adds fixed-factor clock driver which derives clock rate by dividing (div) and multiplying (mult) fixed factors to a parent clock. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2019-02-20sound: Add support for Intel HDASimon Glass1-0/+25
The Intel High-definition Audio is a newer-generation audio system which provides for transfer of a large number of audio stream, each containing up to 16 channels. Add support for HDA as a library which can be used by other drivers. U-Boot currently uses only two channels (stereo). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2019-02-09clk: stm32mp1: correctly handle Clock Spreading GeneratorPatrick Delaunay1-5/+5
To activate the csg option, the driver need to set the bit2 of PLLNCR register = SSCG_CTRL: Spread Spectrum Clock Generator of PLLn enable. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2019-01-16mips: mscc_sgpio: Add DT bindings documentationLars Povlsen1-0/+45
This add device tree binding documentation for the MSCC serial GPIO driver. Signed-off-by: Lars Povlsen <lars.povlsen@microsemi.com> Acked-by: Linus Walleij <linus.walleij@linaro.org>
2019-01-01w1: Add driver for i.MX bus master controllerMartin Fuzzey1-0/+37
Two variants of controllers are supported: V1 (bitwise only) found in i.MX21, i.MX27, i.MX31, i.MX51 V2 (byte operations) found in i.MX25, i.MX35, i.MX50, i.MX53 Only tested on i.MX53 hardware but in both modes (by modifying the device tree). Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
2018-12-10power: add FAN53555 family supportPhilipp Tomsich1-0/+23
This adds a driver for the FAN53555 family of regulators and wraps it in a PMIC implementation. While these devices support a 'normal' and 'suspend' mode (controlled via an external pin) to switch between two programmable voltages, this incarnation of the driver assumes that the device is always operating in 'normal' mode. Only setting/reading the programmed voltage is supported at this time and the following device functionality remains unsupported: - switching the selected voltage (via a GPIO) - disabling the voltage output via software-control This matches the functionality of the Linux driver. Tested on a RK3399-Q7 (with 'option 5' devices): setting voltages from the U-Boot shell and verifying output voltages on the board. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-12-10bootcount: add uclass for bootcountPhilipp Tomsich1-0/+30
The original bootcount methods do not provide an interface to DM and rely on a static configuration for I2C devices (e.g. bus, chip-addr, etc. are configured through defines statically). On a modern system that exposes multiple devices in a DTS-configurable way, this is less than optimal and a interface to DM-based devices will be desirable. This adds a simple driver that is DM-aware and configurable via DTS. If ambiguous (i.e. multiple bootcount-devices are present) the /chosen/u-boot,bootcount-device property can be used to select one bootcount device. Initially, this provides support for the following DM devices: * RTC devices Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-11-29spi: cadence_qspi: use "cdns,qspi-nor" as compatibleSimon Goldschmidt1-1/+1
Linux uses "cdns,qspi-nor" as compatible string for the cadence qspi driver, so change driver, docs and all device trees. Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-11-17ram: Introduce K3 AM654 DDR Sub System driverLokesh Vutla1-0/+46
K3 based AM654 devices has DDR memory subsystem that comprises Synopys DDR controller, Synopsis DDR phy and wrapper logic to intergrate these blocks into the device. This DDR subsystem provides an interface to external SDRAM devices. Adding support for the initialization of the external SDRAM devices by configuring the DDRSS registers and using the buitin PHY routines. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Schuyler Patton <spatton@ti.com> Signed-off-by: James Doublesin <doublesin@ti.com>
2018-11-17w1-eeprom: Add support for Maxim DS2502 add only memoryMartin Fuzzey1-0/+33
Signed-off-by: Martin Fuzzey <martin.fuzzey@flowbird.group>
2018-11-05net: Add MT7628 ethernet driverStefan Roese1-0/+17
This patch adds ethernet support for the MIPS based Mediatek MT76xx SoCs (e.g. MT7628 and MT7688), including a minimum setup of the integrated switch. This driver is loosly based on the driver version included in this MediaTek github repository: https://github.com/MediaTek-Labs/linkit-smart-uboot.git Tested on the MT7688 LinkIt smart-gateway and on the Gardena-smart-gateway. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Frank Wunderlich <frankwu@gmx.de> Cc: Weijie Gao <hackpascal@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10net: phy: ti: Add binding for the CLK_OUT pin muxingJanine Hagemann1-0/+3
The DP83867 has a muxing option for the CLK_OUT pin. It is possible to set CLK_OUT for different channels. Create a binding to select a specific clock for CLK_OUT pin. Based on commit 9708fb630d19 ("net: phy: dp83867: Add binding for the CLK_OUT pin muxing option") of mainline linux kernel. Signed-off-by: Janine Hagemann <j.hagemann@phytec.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-10net: phy: ti: Add lane swapping support in the DP83867 TI's PHY driverJanine Hagemann1-0/+5
This patch adds support for enabling or disabling the lane swapping (called "port mirroring" in PHY's CFG4 register) feature of the DP83867 TI's PHY device. One use case is when bootstrap configuration enables this feature (because of e.g. LED_0 wrong wiring) so then one needs to disable it in software (at u-boot/Linux). Based on commit fc6d39c39581 ("net: phy: dp83867: Add lane swapping support in the DP83867 TI's PHY driver") of mainline linux kernel. Signed-off-by: Janine Hagemann <j.hagemann@phytec.de> Acked-by: Lukasz Majewski <lukma@denx.de> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
2018-10-07dt/bindings: add bindings for opteeJens Wiklander1-0/+31
Sync with c8bfafb15944 ("dt/bindings: add bindings for optee") from Linux kernel. Introduces linaro prefix and adds bindings for ARM TrustZone based OP-TEE implementation. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
2018-10-03Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini1-0/+5
This is the PR for SPI-NAND changes along with few spi changes. [trini: Re-sync changes for ls1012afrwy_qspi*_defconfig] Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-30Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini1-0/+23
Signed-off-by: Tom Rini <trini@konsulko.com>
2018-09-29dt-bindings: w1-eeprom: eep_sandbox: create bindingsEugen Hristev1-0/+34
Bindings for sandbox onewire eeprom driver Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-29dt-bindings: w1-eeprom: ds24xxx: create bindingsEugen Hristev1-0/+37
Bindings for Maxim's ds24 onewire EEPROM families driver Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-29dt-bindings: W1: w1-gpio: added bindings for w1-gpioEugen Hristev1-0/+40
Added bindings specification for bitbanged gpio driver for Dallas one wire protocol Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2018-09-29doc: dtbinding: Add file system firmware loader binding documentTien Fong Chee2-0/+69
Add a document to describe file system firmware loader binding information. Signed-off-by: Tien Fong Chee <tien.fong.chee@intel.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-09-28video_osd: Add ihs_video_out driverMario Six1-0/+23
Add a driver for IHS OSDs on IHS FPGAs. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Mario Six <mario.six@gdsys.cc>
2018-09-22pinctrl: bcm6838: add pinctrl supportPhilippe Reynes1-0/+35
Add pinctrl support for broadcom bcm6838 SoC. Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
2018-09-20dt-bindings: Add bindings for SPI NAND devicesBoris Brezillon1-0/+5
Add bindings for SPI NAND chips. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Jagan Teki <jagan@openedev.com>
2018-09-11remoteproc: Introduce K3 remoteproc driverLokesh Vutla1-0/+50
Add support for K3 based remoteproc driver that communicates with TISCI to start start a remote processor. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11remoteproc: Introduce K3 system controllerLokesh Vutla1-0/+24
K3 specific SoCs have a dedicated microcontroller for doing resource management. Any HLOS/firmware on compute clusters should load a firmware to this microcontroller before accessing any resource. Adding support for loading this firmware. After the K3 system controller got loaded with firmware and started up it sends out a boot notification message through the secure proxy facility using the TI SCI protocol. Intercept and receive this message through the rproc start operation which will need to get invoked explicitly after the firmware got loaded. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
2018-09-11mailbox: Introduce K3 Secure Proxy DriverLokesh Vutla1-0/+40
Secure Proxy module manages hardware threads that are meant for communication between the processor entities. Adding support for this driver. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-09-11sysreset: Add TI System Control Interface (TI SCI) sysreset driverAndreas Dannenberg1-0/+29
Devices from the TI K3 family of SoCs like the AM654x contain a Device Management and Security Controller (SYSFW) that manages the low-level device control (like clocks, resets etc) for the various hardware modules present on the SoC. These device control operations are provided to the host processor OS through a communication protocol called the TI System Control Interface (TI SCI) protocol. This patch adds a system reset driver that communicates to the system controller over the TI SCI protocol for allowing to perform a system- wide SoC reset. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11power domain: Introduce TI System Control Interface (TI SCI) power domain driverAndreas Dannenberg1-0/+52
Some TI Keystone 2 and K3 family of SoCs contain a system controller (like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and the Device Management and Security Controller on AM65x SoCs) that manage the low-level device control (like clocks, resets etc) for the various hardware modules present on the SoC. These device control operations are provided to the host processor OS through a communication protocol called the TI System Control Interface (TI SCI) protocol. This patch adds a power domain driver that communicates to the system controller over the TI SCI protocol for performing power management of various devices present on the SoC. Various power domain functionalities are achieved by the means of different TI SCI device operations provided by the TI SCI framework. This code is loosely based on the drivers/soc/ti/ti_sci_pm_domains.c driver of the Linux kernel. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11clk: Introduce TI System Control Interface (TI SCI) clock driverAndreas Dannenberg1-0/+53
Some TI Keystone 2 and K3 family of SoCs contain a system controller (like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and the Device Management and Security Controller on AM65x SoCs) that manage the low-level device control (like clocks, resets etc) for the various hardware modules present on the SoC. These device control operations are provided to the host processor OS through a communication protocol called the TI System Control Interface (TI SCI) protocol. This patch adds a clock driver that communicates to the system controller over the TI SCI protocol for performing clock management of various devices present on the SoC. Various clock functionality is achieved by the means of different TI SCI device operations provided by the TI SCI framework. This code is loosely based on the drivers/clk/keystone/sci-clk.c driver of the Linux kernel. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11reset: Introduce TI System Control Interface (TI SCI) reset driverAndreas Dannenberg1-0/+54
Some TI Keystone 2 and K3 family of SoCs contain a system controller (like the Power Management Micro Controller (PMMC) on 66AK2G SoCs and the Device Management and Security Controller on AM65x SoCs) that manage the low-level device control (like clocks, resets etc) for the various hardware modules present on the SoC. These device control operations are provided to the host processor OS through a communication protocol called the TI System Control Interface (TI SCI) protocol. This patch adds a reset driver that communicates to the system controller over the TI SCI protocol for performing reset management of various devices present on the SoC. Various reset functionalities are achieved by the means of different TI SCI device operations provided by the TI SCI framework. This code is loosely based on the drivers/reset/reset-ti-sci.c driver of the Linux kernel. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2018-09-11firmware: Add basic support for TI System Control Interface (TI SCI) protocolLokesh Vutla1-0/+76
Texas Instrument's System Control Interface (TI SCI) message protocol is used in Texas Instrument's System on Chip (SoC) such as those in the K3 family AM654 SoC to communicate between various compute processors with a central system controller entity. The TI SCI message protocol provides support for management of various hardware entities within the SoC. Add support driver to allow communication with system controller entity within the SoC using the mailbox client. This is mostly derived from the TI SCI driver in Linux located at drivers/firmware/ti_sci.c. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Andreas Dannenberg <dannenberg@ti.com>
2018-08-20drivers: regulator: fixed: add u-boot, off-on-delay-usPeng Fan1-0/+1
Add u-boot,off-on-delay-us for fixed regulator. Depends on board design, the gpio regulator sometimes connects with a big capacitance. When need to off, then on the regulator, if there is no enough delay, the voltage does not drop to 0, so introduce this property to handle such case. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
2018-08-04dt-bindings: Document STM32 ADC DT bindingsFabrice Gasnier1-0/+141
This patch adds documentation of device tree bindings for the STM32 ADC. It's based on linux-v4.18-rc* dt-bindings, at the time of writing: - Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-07-31CREG GPIO: add device tree bindingsEugeniy Paltsev1-0/+43
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2018-07-24doc: Move device tree bindings documentation to doc/device-tree-bindingsBreno Lima3-0/+111
Currently the U-Boot project contains 2 documentation directories: - doc/ - Documentation/ The Documentation directory only contains device tree bindings related content, so move the 3 files to doc/device-tree-bindings/. Signed-off-by: Breno Lima <breno.lima@nxp.com>
2018-07-21spl: document 'chosen/u-boot, spl-boot-device'Philipp Tomsich1-0/+10
To let the full U-Boot know where it was booted from (i.e. which of the entries in /chosen/u-boot,spl-boot-order' contained a valid image), we define (and document) /chosen/u-boot,spl-boot-device as the property that could/should automatically be injected by SPL. This commit only contains a documentation change, which documents the new property and the intended usage. Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com> Tested-by: Klaus Goger <klaus.goger@theobroma-systems.com>
2018-07-20stm32mp1: clk: support digital bypassPatrick Delaunay1-1/+3
HSE and LSE bypass shall support both analog and digital signals. This patch add a way to select digital bypas case in the device tree and set the associated bit DIGBYP in RCC_BDCR and RCC_OCEN register during clock tree initialization. Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
2018-07-09fdt: Add device tree memory bindingsMichael Pratt1-0/+67
Support a default memory bank, specified in reg, as well as board-specific memory banks in subtree board-id nodes. This allows memory information to be provided in the device tree, rather than hard-coded in, which will make it simpler to handle similar devices with different memory banks, as the board-id values or masks can be used to match devices. Signed-off-by: Michael Pratt <mpratt@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Vadim Bendebury <vbendeb@chromium.org>
2018-06-13x86: irq: Support discrete PIRQ routing registers via device treeBin Meng1-0/+6
Currently both pirq_reg_to_linkno() and pirq_linkno_to_reg() assume consecutive PIRQ routing control registers. But this is not always the case on some platforms. Introduce a new device tree property intel,pirq-regmap to describe how the PIRQ routing register offset is mapped to the link number and adjust the irq router driver to utilize the mapping. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2018-06-04Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini1-0/+65
2018-05-29mvebu: pinctrl: sync compatible string with Linux 4.17-rc4Evan Wang1-8/+8
For pinctrl driver of mvebu, the compatible strings supported are defined differently from Linux version. The patch aligned the compatible string with Linux 4.17-rc4. Signed-off-by: Evan Wang <xswang@marvell.com> Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>
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