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2021-05-14riscv: Don't reserve AI ram in k210 dtsSean Anderson1-12/+0
It is no longer necessary to disallow ai ram, since it is enabled by the sram driver. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2021-05-14riscv: k210: Use AI as the parent clock of aisram, not PLL1Sean Anderson1-1/+1
Testing showed that disabling AI while leaving PLL1 enabled disabled the aisram. This suggests that AI is a more appropriate clock for that ram bank. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2021-05-14riscv: k210: Rename airam to aisramSean Anderson1-2/+2
This is more consistent with the naming of other ram banks, and matches what Linux is doing. Reported-by: Damien Le Moal <Damien.LeMoal@wdc.com> Signed-off-by: Sean Anderson <seanga2@gmail.com>
2021-05-14riscv: Enable some devices pre-relocationSean Anderson1-0/+4
These devices are necessary for the clock driver, which is required by the sram driver, to run pre-relocation. Signed-off-by: Sean Anderson <seanga2@gmail.com>
2021-05-13am335x: add support for cape detect functionalityKory Maincent1-0/+1
Update the Kconfig and the board file to make the am335x board compatible with cape detection. Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
2021-05-13arm: am335x: add support for i2c2 busKory Maincent1-0/+1
The am335x from BeagleBone use i2c EEPROM to detect capes. The memory is wired to i2c bus 2 therefore it need to be enabled. Add i2c2 clock, pinmux description and pinmux enable function. Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
2021-05-13arm: sunxi: add support for DIP detection to CHIP boardKory Maincent1-0/+9
Add the extension_board_scan specific function to scan the information of the EEPROM on one-wire and fill the extension struct. Add the Kconfig symbol to enable the needs to detect DIPs. Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> Reviewed-by: Maxime Ripard <maxime@cerno.tech> Acked-by: Andre Przywara <andre.przywara@arm.com>
2021-05-13am57xx: add support for cape detect functionalityKory Maincent1-0/+1
This commit enables using the extension board detection mechanism on AM57xx based platforms. Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
2021-05-13pytest: add sandbox test for "extension" commandKory Maincent4-0/+21
This commit extends the sandbox to implement a dummy extension_board_scan() function and enables the extension command in the sandbox configuration. It then adds a test that checks the proper functionality of the extension command by applying two Device Tree overlays to the sandbox Device Tree. Signed-off-by: Kory Maincent <kory.maincent@bootlin.com> [trini: Limit to running on sandbox] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-05-12ARM: renesas: Scrub duplicate memory nodes from DT on Gen3Marek Vasut1-0/+1
Scrub duplicate /memory@* node entries here. Some R-Car DTs might contain multiple /memory@* nodes, however fdt_fixup_memory_banks() either generates single /memory node or updates the first /memory node. Any remaining memory nodes are thus potential duplicates. However, it is not possible to delete all the memory nodes right away, since some of those might not be DRAM memory nodes, but some sort of other memory. Thus, delete only the memory nodes which are in the R-Car3 DBSC ranges. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
2021-05-12Merge tag 'ti-v2021.07-rc3' of ↵Tom Rini23-25/+8922
https://source.denx.de/u-boot/custodians/u-boot-ti - Initial support for AM64 EVM and SK - K3 DDR driver unification for J7 and AM64 platforms. - Minor fixes for TI clock driver
2021-05-12ARM: dts: k3-am642-sk: Add ethernet related DT nodesVignesh Raghavendra2-0/+78
Add CPSW related nodes for AM642 SK. There are two CPSW ports on the board but U-Boot supports only the first port. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-05-12ARM: dts: k3-am64-main: Add CPSW DT nodesVignesh Raghavendra4-0/+185
AM64 as CPSW3G IP with 2 external ports. Add DT entries for the same (based on kernel DT). Disable second port as its by default set to ICSS usage on EVM. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2021-05-12arm: dts: am642-r5-sk: Add r5 specific dtsLokesh Vutla3-1/+2337
Add R5 specific dts for AM64 SK Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
2021-05-12arm: dts: am642-sk: Add initial sk dtsLokesh Vutla3-1/+183
AM642 StarterKit (SK) board is a low cost, small form factor board designed for TI’s AM642 SoC. It supports the following interfaces: * 2 GB LPDDR4 RAM * x2 Gigabit Ethernet interfaces capable of working in switch and MAC mode * x1 USB 3.0 Type-A port * x1 UHS-1 capable µSD card slot * 2.4/5 GHz WLAN + Bluetooth 4.2 through WL1837 * 512 Mbit OSPI flash * x2 UART through UART-USB bridge * XDS110 for onboard JTAG debug using USB * Temperature sensors, user push buttons and LEDs * 40-pin Raspberry Pi compatible GPIO header * 24-pin header for peripherals in MCU island (I2C, UART, SPI, IO) * 54-pin header for Programmable Realtime Unit (PRU) IO pins * Interface for remote automation. Includes: * power measurement and reset control * boot mode change Add basic support for AM642 SK. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-12arm: dts: am642-evm: Add I2C nodesLokesh Vutla3-0/+64
Add I2C nodes for AM64 and enable pinmux for i2c0 for reading eeprom data. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-12arm: dts: k3-am642-r5-evm: Do not use power-domains for I2CLokesh Vutla1-0/+5
I2C EEPROM will be probed before SYSFW is available. So drop the power-domains property for I2C. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-12arm: dts: k3-am64-evm: Make chip id available before pre-relocLokesh Vutla1-0/+7
Chipid will be needed for SoC detection for all stages of U-Boot. So make it u-boot,dm-spl Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-12arm: am64x: Add support for selecting DT based on EEPROMLokesh Vutla1-0/+26
Enable support for selecting DTB within SPL based on EEPROM. This will help to use single defconfig for both EVM and SK Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-12board: ti: am64x: Add support for reading eeprom dataLokesh Vutla1-0/+3
I2C EEPROM data contains the board name and its revision. Add support for: - Reading EEPROM data and store a copy at end of SRAM - Updating env variable with relevant board info - Printing board info during boot. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-12arm: dts: k3-am642-r5-evm: Add GPIO DDR VTT regulatorNishanth Menon1-0/+28
Add DDR VTT regulator. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: dts: k3-am64-main: Add GPIO nodesNishanth Menon1-0/+44
Add main domain GPIO nodes. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: am642: Add support for triggering ddr init from SPLDave Gerlach1-0/+6
In SPL, DDR should be made available by the end of board_init_f() so that apis in board_init_r() can use ddr. Adding support for triggering DDR initialization from board_init_f(). Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: dts: k3-am642: Add ddr nodeDave Gerlach3-0/+4394
Introduce ddr node for am642 needed for all ddr configurations. Also, introduce the 1600MTs DDR4 configuration that is supported on the am642-evm. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: dts: k3-am642: Add r5 specific dt supportDave Gerlach3-1/+229
Add initial support for dt that runs on r5. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: dts: k3-am642: Add initial support for EVMDave Gerlach2-0/+247
The AM642 EValuation Module (EVM) is a board that provides access to various peripherals available on the AM642 SoC, such as PCIe, USB 2.0, CPSW Ethernet, ADC, and more. Add basic support. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: dts: ti: Add Support for AM642 SoCDave Gerlach4-0/+649
The AM642 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable applications such as Motor Drives, PLC, Remote IO and IoT Gateways. Some highlights of this SoC are: * Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F MCUs, and a single Cortex-M4F. * Two Gigabit Industrial Communication Subsystems (ICSSG). * Integrated Ethernet switch supporting up to a total of two external ports. * PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other peripherals. * Centralized System Controller for Security, Power, and Resource Management (DMSC). See AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2 Introduce basic support for the AM642 SoC to enable SD/MMC boot. Introduce a limited set of MAIN domain peripherals under cbass_main and a set of MCU domain peripherals under cbass_mcu. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12board: ti: am64x: Add board support for am64x evmDave Gerlach1-0/+1
Add board specific initialization for am64x based boards. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12armv8: mach-k3: am642: Add custom MMU supportKeerthy1-0/+41
Change the memory attributes for the DDR regions used by the remote processors on AM65x so that the cores can see and execute the proper code. A separate table based on the previous K3 SoCs is introduced since the number of remote processors and their DDR usage is different between the SoC families. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: am642: Shut down R5 core after ATF startup on A53Suman Anna1-0/+51
The AM642 SoCs use the Main R5FSS0 as a boot processor, and runs the R5 SPL that performs the initialization of the System Controller processor and starting the Arm Trusted Firmware (ATF) on the Arm Cortex A53 cluster. The Core0 serves as this boot processor and is parked in WFE after all the initialization. Core1 does not directly participate in the boot flow, and is simply parked in a WFI. Power down these R5 cores (and the associated RTI timer resources that were indirectly powered up) after starting up ATF on A53 by using the appropriate SYSFW API in release_resources_for_core_shutdown(). This allows these Main R5F cores to be further controlled from the A53 to run regular applications. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: am642: Use mmc start and stop callbacksDave Gerlach1-1/+33
To avoid any glitches on MMC clock line, make use of pm per and post callbacks when loading sysfw. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: am642: Load SYSFW binary and config from boot mediaDave Gerlach1-0/+37
Use the System Firmware (SYSFW) loader framework to load and start the SYSFW as part of the AM642 early initialization sequence. Also make use of existing logic to detect if ROM has already loaded sysfw and avoided attempting to reload and instead just prepare to use already running firmware. While at it also initialize the MAIN_UART1 pinmux as it is used by SYSFW to print diagnostic messages. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: am642: Store boot info from ROMDave Gerlach2-0/+23
For AM642, ROM supports loading system firmware directly from boot image. ROM passes information about the number of images that are loaded to bootloader at a specific address that is temporary. Add support for storing this information somewhere permanent before it gets corrupted. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: am642: Unlock all applicable control MMR registersDave Gerlach2-4/+22
To access various control MMR functionality the registers need to be unlocked. Do that for all control MMR regions in the MAIN domain. Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: am642: Add support for boot device detectionKeerthy5-0/+198
AM642 allows for booting from primary or backup boot media. Both media can be chosen individually based on switch settings. ROM looks for a valid image in primary boot media, if not found then looks in backup boot media. In order to pass this boot media information to boot loader, ROM stores a value at a particular address. Add support for reading this information and determining the boot media correctly. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12arm: mach-k3: Add basic support for AM642 SoC definitionDave Gerlach3-4/+39
The AM642 SoC belongs to the K3 Multicore SoC architecture platform, providing advanced system integration to enable applications such as Motor Drives, PLC, Remote IO and IoT Gateways. Some highlights of this SoC are: * Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F MCUs, and a single Cortex-M4F. * Two Gigabit Industrial Communication Subsystems (ICSSG). * Integrated Ethernet switch supporting up to a total of two external ports. * PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other peripherals. * Centralized System Controller for Security, Power, and Resource Management (DMSC). See AM64X Technical Reference Manual (SPRUIM2, Nov 2020) for further details: https://www.ti.com/lit/pdf/spruim2 Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-05-12Revert "fdt: translate address if #size-cells = <0>"Dario Binacchi1-21/+0
This reverts commit d64b9cdcd475eb7f07b49741ded87e24dae4a5fc. As pointed by [1] and [2], the reverted patch made every DT 'reg' property translatable. What the patch was trying to fix was fixed in a different way from previously submitted patches which instead of correcting the generic address translation function fixed the issue with appropriate platform code. [1] https://patchwork.ozlabs.org/project/uboot/patch/1614324949-61314-1-git-send-email-bmeng.cn@gmail.com/ [2] https://lore.kernel.org/linux-clk/20210402192054.7934-1-dariobin@libero.it/T/ Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-11Merge tag 'u-boot-imx-20210502' of ↵Tom Rini25-218/+2539
https://gitlab.denx.de/u-boot/custodians/u-boot-imx u-boot-imx-20210502 ------------------- - mx6: fixes for Ventana - local fixes from maintainer - imx7d: Ronetix's iMX7-CM - imx8: Ronetix iMX8MQ-CM Engicam i.Core MX8M Compulab iot-gate-imx8 - Fixes i.MX8 documentation - Fixes phy usage with fec
2021-05-11boards: Disable CMD_SATA on platforms that no longer have a SATA driver enabledTom Rini1-11/+0
There are a number of platforms that depend on a SATA driver that has been converted to require AHCI but the platforms themselves are behind on other migrations that would make it trivial to enable AHCI. Disable SATA in these cases. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-05-07Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini3-0/+30
2021-05-05riscv: cpu: fu740: clear feature disable CSRGreen Wan1-0/+15
Clear feature disable CSR to turn on all features of hart. The detail is specified at section, 'SiFive Feature Disable CSR', in user manual https://sifive.cdn.prismic.io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-05riscv: cpu: Add callback to init each coreGreen Wan2-0/+15
Add a callback harts_early_init() to start.S to allow different riscv hart perform setup code for each hart as early as possible. Since all the harts enter the callback, they must be able to run the same setup. Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-04sandbox: add test of CONFIG_ENV_IMPORT_FDTRasmus Villemoes1-0/+7
Check that a variable defined in /config/environment is found in the run-time environment, and that clearing fdt_env_path from within that node works. Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Acked-by: Joe Hershberger <joe.hershberger@ni.com> [trini: Conditionalize the test being linked in] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-05-04test: Add gpio-sysinfo testSean Anderson1-0/+7
This adds a test for the gpio-sysinfo driver. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-02ARM:imx:imx8mq-cm: Add support for Ronetix iMX8MQ-CMIlko Iliev4-5/+659
Supported peripherals: Ethernet, eMMC, Serial. U-Boot SPL 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14 +0200) Normal Boot Trying to boot from MMC2 U-Boot 2021.04-00911-g5fa1e2ffeb-dirty (Apr 23 2021 - 09:11:14 +0200) CPU: Freescale i.MX8MQ rev2.1 at 1000 MHz Reset cause: POR Model: Ronetix iMX8M-CM SoM DRAM: 1 GiB WDT: Started with servicing (60s timeout) MMC: FSL_SDHC: 0, FSL_SDHC: 1 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 (eth0) using random MAC address - 42:0d:e7:78:da:53 eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 u-boot=> Signed-off-by: Ilko Iliev <iliev@ronetix.at>
2021-05-02imx: Add support for Ronetix's iMX7-CM boardIlko Iliev4-0/+460
Console boot log: U-Boot SPL 2021.04-00836-ga6232e065d-dirty (Apr 16 2021 - 15:16:35 +0200) Trying to boot from MMC1 U-Boot 2021.04-00836-ga6232e065d-dirty (Apr 16 2021 - 15:16:35 +0200) CPU: Freescale i.MX7D rev1.3 1000 MHz (running at 792 MHz) CPU: Commercial temperature grade (0C to 95C) at 44C Reset cause: POR Model: Ronetix iMX7-CM Board Board: iMX7-CM DRAM: 512 MiB PMIC: PFUZE3000 DEV_ID=0x30 REV_ID=0x11 MMC: FSL_SDHC: 0, FSL_SDHC: 2 Loading Environment from MMC... OK In: serial Out: serial Err: serial Net: Warning: ethernet@30be0000 (eth0) using random MAC address - fe:be:37:01:5a:3f eth0: ethernet@30be0000 Hit any key to stop autoboot: 0 Signed-off-by: Ilko Iliev <iliev@ronetix.at>
2021-05-02imx: mkimage_fit_atf: fix file size reportingTim Harvey1-4/+4
instead using ls and awk to determine file size use stat instead. This fixes an invalid size reporting for user or group names that have spaces in them. This adds a dependency on the stat application which is part of the coreutils package which also includes ls. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-05-02arm: imx8m: add support for Compulab iot-gate-imx8 (imx8mm-cl-iot-gate)Ying-Chun Liu (PaulLiu)1-0/+8
Add initial support for Compulab iot-gate-imx8 board (imx8mm-cl-iot-gate). The initial support includes: - MMC - eMMC - I2C - FEC - Serial console Signed-off-by: Kirill Kapranov <kirill.kapranov@compulab.co.il> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Peter Robinson <pbrobinson@gmail.com>
2021-05-02arm: dts: add imx8mm-cl-iot-gate dts fileYing-Chun Liu (PaulLiu)3-0/+810
Add board dts for imx8mm-cl-iot-gate Signed-off-by: Kirill Kapranov <kirill.kapranov@compulab.co.il> Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Signed-off-by: Valentin Raevsky <valentin@compulab.co.il> Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org> Cc: Peter Robinson <pbrobinson@gmail.com>
2021-05-02arm: dts: imx6qdl-gw552x.dtsi: fix VBUS supplyTim Harvey1-1/+0
Remove the invalid 'regulator-always-on' property to resolve: starting USB... Bus usb@2184000: Error enabling VBUS supply (ret=-13) probe failed, error -13 Bus usb@2184200: USB EHCI 1.00 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-23 07:36:09 +0300