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2021-05-24ARM: don't use -ffunction-sections/-fdata-sections with LTO buildMarek Behún1-2/+6
When building with LTO, using -ffunction-sections/-fdata-sections is not useful anymore. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24ARM: make LTO availableMarek Behún2-0/+3
Make LTO available for ARM architecture. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24armv8: SPL: discard relocation informationMarek Behún1-0/+1
For some reason when building SPL for ARMv8 with LTO, the relocation information is not discarded. Discard it explicitly in the linker script. This fixes LTO build for imx8mm_venice_defconfig. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24ARM: omap3: fix LTO for DM3730 (and possibly other omap3 boards)Marek Behún1-0/+1
Adam Ford says that DM3730 needs board.c compiled without LTO flags. Signed-off-by: Marek Behún <marek.behun@nic.cz> Tested-by: Adam Ford <aford173@gmail.com>
2021-05-24ARM: fix LTO for rockchip and samsungMarek Behún1-1/+1
When building with LTO, the compiler complains about type mismatch of function usb_gadget_handle_interrupts(). This function is defined without parameters in files arch/arm/mach-rockchip/board.c board/samsung/common/exynos5-dt.c but it should have one parameter, int index. Fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2021-05-24ARM: fix LTO for seaboardMarek Behún1-0/+1
When seaboard_defconfig is compiled with LTO, the compiler complains about some instructions not being supported in ARM mode. This is caused by arch/arm/mach-tegra/tegra20/warmboot_avp.c having different CFLAGS declared in Makefile. This file needs to be compiled without LTO. Fix this by removing -flto for this file. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24ARM: imx8m: fix imx_eqos_txclk_set_rate() type mismatch for LTOMarek Behún1-1/+1
When building imx8mp_evk_defconfig with LTO, the compiler complains about type mismatch of function imx_eqos_txclk_set_rate() in file drivers/net/dwc_eth_qos.c:845:12 which contains a weak definition of this function, vs file arch/arm/mach-imx/imx8m/clock_imx8mm.c which contains an implementation. Change the type of this function in the implementation to fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24ARM: kona: fix clk_bsc_enable() type mismatch for LTOMarek Behún1-1/+1
When building with LTO, the compiler complains about type mismatch of function clk_bsc_enable() in file: arch/arm/cpu/armv7/kona-common/clk-stubs.c vs other files that define or use this function: warning: type of ‘clk_bsc_enable’ does not match original declaration. Change the type of this function to that of the other usages. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24ARM: fix LTO for keystoneMarek Behún1-0/+1
When building keystone with LTO the compiler complains: Error: selected processor does not support `smc #0' in Thumb mode Fix this by removing -flto for the file implementing these SMC calls. Signed-off-by: Marek Behún <marek.behun@nic.cz>
2021-05-24ARM: fix LTO for imx28_xeaMarek Behún2-2/+2
When imx28_xea_defconfig is built with LTO, the compiler complains about the two different declarations of _start: include/asm-generic/sections.h as extern void _start(void); arch/arm/cpu/arm926ejs/mxs/mxs.c as extern uint32_t _start; Fix this. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24ARM: fix LTO build for some thumb-interwork casesMarek Behún2-0/+3
Fix LTO build for some thumb-interwork usecases (such as for da850evm_defconfig), where inline assmebly such as mrc p15,0,r2,c1,c0,0 causes the compiler to fail during LTO linking with Error: selected processor does not support `mrc p15,0,r2,c1,c0,0' in Thumb mode Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24ARM: make gd a function call for LTO and set via set_gd()Marek Behún5-12/+12
On ARM, the gd pointer is stored in registers r9 / x18. For this the -ffixed-r9 / -ffixed-x18 flag is used when compiling, but using global register variables causes errors when building with LTO, and these errors are very difficult to overcome. Richard Biener says [1]: Note that global register vars shouldn't be used with LTO and if they are restricted to just a few compilation units the recommended fix is to build those CUs without -flto. We cannot do this for U-Boot since all CUs use -ffixed-reg flag. It seems that with LTO we could in fact store the gd pointer differently and gain performance or size benefit by allowing the compiler to use r9 / x18. But this would need more work. So for now, when building with LTO, go the clang way, and instead of declaring gd a global register variable, we make it a function call via macro. [1] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=68384 Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24ARM: global_data: make set_gd() work for armv5 and armv6Marek Behún1-1/+3
The Thumb instruction `ldr` is able to move high registers only from armv7. For armv5 and armv6 we have to use `mov`. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24sandbox: enable LTO by defaultMarek Behún1-0/+1
Build sandbox targets with LTO by default. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24sandbox: make LTO availableMarek Behún2-0/+5
Make LTO available for sandbox architecture. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-24sandbox: use sections instead of symbols for getopt array boundariesMarek Behún5-11/+32
In style of linked lists, instead of declaring symbols for boundaries of getopt options array in the linker script, declare corresponding sections and retrieve the boundaries via static inline functions. Without this clang's LTO produces binary without any getopt options, because for some reason it thinks that array is empty (start and end symbols are at the same address). Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24build: use thin archives instead of incremental linkingMarek Behún1-3/+7
Currently we use incremental linking (ld -r) to link several object files from one directory into one built-in.o object file containing the linked code from that directory (and its subdirectories). Linux has, some time ago, moved to thin archives instead. Thin archives are archives (.a) that do not really contain the object files, only references to them. Using thin archives instead of incremental linking - saves disk space - apparently works better with dead code elimination - makes things easier for LTO The third point is the important one for us. With incremental linking there are several options how to do LTO, and that would unnecessarily complicate things. We have to use the --whole-archive/--no-whole-archive linking option instead of --start-group/--end-group, otherwise linking may fail because of unresolved symbols, or the resulting binary will be unusable. We also need to use the P flag for ar, otherwise final linking may fail. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-24treewide: Convert macro and uses of __section(foo) to __section("foo")Marek Behún29-65/+68
This commit does the same thing as Linux commit 33def8498fdd. Use a more generic form for __section that requires quotes to avoid complications with clang and gcc differences. Remove the quote operator # from compiler_attributes.h __section macro. Convert all unquoted __section(foo) uses to quoted __section("foo"). Also convert __attribute__((section("foo"))) uses to __section("foo") even if the __attribute__ has multiple list entry forms. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-20Merge https://source.denx.de/u-boot/custodians/u-boot-marvellTom Rini1-2/+2
- Sync Armada mvpp2 ethernet driver with Marvell version (misc Marvell authors)
2021-05-20Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini8-101/+94
2021-05-20arm: mvebu: armada-3720-uDPU.dts: Change back to phy-mode "2500base-x"Stefan Roese1-2/+2
With commit 8678776df6f5 (arm: mvebu: armada-3720-uDPU: fix PHY mode definition to sgmii-2500) the PHY mode was switch to "sgmii-2500", even when this is functionally incorrect since "2500base-x" was not supported in U-Boot at that time. As this mode is now supported (at least present in the headers), this patch moves back to the orinal version. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Jakov Petrina <jakov.petrina@sartura.hr> Cc: Vladimir Vid <vladimir.vid@sartura.hr> Cc: Luka Perkov <luka.perkov@sartura.hr>
2021-05-19riscv: Drop USE_SPL_FIT_GENERATORBin Meng1-100/+0
Now that we have switched to binman to generate u-boot.itb for all RISC-V boards, USE_SPL_FIT_GENERATOR is no longer needed and can be dropped. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19riscv: ae350: Switch to use binman to generate u-boot.itbBin Meng2-0/+4
Use the new BINMAN_STANDALONE_FDT option for AE350 based SPL defconfigs, so that binman is now used to generate u-boot.itb. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-19riscv: qemu: Switch to use binman to generate u-boot.itbBin Meng4-0/+18
By utilizing the newly introduced BINMAN_STANDALONE_FDT option, along with a new dedicated device tree source file for the QEMU virt target used for binman only, we can now use binman to generate u-boot.itb. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19riscv: dts: Sort build targets in alphabetical orderBin Meng1-1/+1
Sort the RISC-V DTS build targets by their Kconfig target names in alphabetical order. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19riscv: sifive: unleashed: Switch to use binman to generate u-boot.itbBin Meng2-0/+71
At present SiFive Unleashed board uses the Makefile to create the FIT, using USE_SPL_FIT_GENERATOR, which is deprecated as per the Makefile warning. Update to use binman instead. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-05-19arm64: zynqmp: Add description for SOM/Kria boardsMichal Simek7-0/+1109
The patch contains several DT files for SOM platform. Carrier card is sck-kv (KV260) revA/B. SMK-K26 is description for starter kit which doesn't have EMMC populated. And SM-K26 is full som with EMMC. Files are divided in this way to make sure that SOM can be plugged to different carrier card and all peripherals on SOM (or defined by a spec) can be used by U-Boot. Full DT for SOM+CC can be merged together as overlays. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19arm64: zynqmp: Add psgtr DT descriptionsMichal Simek10-1/+79
Mainline kernel has psgtr driver that's why it is good to add description to DT files. Some boards are just missing description for USB3 and sata. zc1751-dc1 and p-a2197 are also missing clock descriptions for input clocks. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19arm64: zynqmp: Add pinctrl descriptionMichal Simek11-1/+2470
ZynqMP pinctrl Linux driver has been merged to 5.13-rc1 kernel. Based on it DT files can be extended by pinctrl configurations. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19arm64: zynqmp: Add zynqmp firmware specific DT nodesT Karthik Reddy2-0/+80
Probe zynqmp firmware driver by adding zynqmp firmware, power & ipi mailbox device tree nodes for mini emmc. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com>
2021-05-19arm64: zynqmp: Add missing mio-bank properties to sdhciMichal Simek1-0/+1
Add missing xlnx,mio-bank property to sdhci node. Also add properties with 0 value to have it listed in case that files are copied to different projects where default case doesn't need to be handled in the same way. That's why explicitly list them too. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19arm64: zynqmp: Remove comment about clock chipsMichal Simek2-10/+10
These comments weren't push to mainline that's why remove them. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19arm64: zynqmp: Add 'i2c-mux-idle-disconnect' propertyRaviteja Narayanam3-0/+6
I2C muxes that have the slave devices with same address are falling into the below problem. VCK190 system controller (SC) - zynqmp-e-a2197-00-revA.dts I2C1 (0xff030000) -> Mux1 (@0x74) -> Channel 3 -> 0x50 I2C1 (0xff030000) -> Mux2 (@0x75) -> Channel 0 -> 0x50 1. SC accesses I2C1 - Mux1 (0x74) - Channel 3 and then 2. SC accesses I2C1 - Mux2 (0x75) - Channel 0. Now it results in 2 slave devices with same address (0x50) on the I2C bus, making the communication un-reliable. When ' i2c-mux-idle-disconnect' is in DT, after '1', the Mux channel output is disconnected, making none of the channels available to the I2C1. So, there is no question of having the same addressed slave (0x50) present on the bus when we are doing '2'. Same pattern is seen in below two boards also. ZCU208 - zynqmp-zcu208-revA.dts ZCU216 - zynqmp-zcu216-revA.dts Signed-off-by: Raviteja Narayanam <raviteja.narayanam@xilinx.com>
2021-05-19arm64: zynqmp: Add label to all GPIO lines for VCK190 SCSaeed Nowshadi1-7/+7
Add label to GPIO lines so the user-level applications can find any line without knowing its physical path on System Controller on VCK190/VMK180. These labels are describing EMIO gpio connection which depends on PL which we normally don't describe but that's only way to go for now. Lately this should be done out of this source code. Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-19arm64: zynqmp: Add 'silabs,skip-recall' to DDR DIMM si570 clk nodeSaeed Nowshadi1-1/+2
The 'silabs,skip-recall' property prevents interruption in operation of the clock while the driver is being probed. Without this property, the DDR DIMM clk can cause a failure during Versal's boot. Signed-off-by: Saeed Nowshadi <saeed.nowshadi@xilinx.com>
2021-05-19arm64: zynqmp: Add missing silabs,skip-recall for si570 ref clk nodesMichal Simek5-3/+8
All si570 which are used for ps reference clock generation should contain silabs,skip-recall property not to cause break on ps clock. On Versal boards this will cause hang on Versal cpu when it is booted at the same time with SC. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2021-05-18Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini8-151/+281
2021-05-17riscv: Group assembly optimized implementation of memory routines into a submenuBin Meng1-0/+4
Currently all assembly optimized implementation of memory routines show up at the top level of the RISC-V architecture Kconfig menu. Let's group them together into a submenu. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-17riscv: Fix memmove and optimise memcpy when misalignBin Meng2-142/+257
At present U-Boot SPL fails to boot on SiFive Unleashed board, due to a load address misaligned exception happens when loading the FIT image in spl_load_simple_fit(). The exception happens in memmove() which is called by fdt_splice_(). Commit 8f0dc4cfd106 introduces an assembly version of memmove but it does take misalignment into account (it checks if length is a multiple of machine word size but pointers need also be aligned). As a result it will generate misaligned load/store for the majority of cases and causes significant performance regression on hardware that traps misaligned load/store and emulate them using firmware. The current behaviour of memcpy is that it checks if both src and dest pointers are co-aligned (aka congruent modular SZ_REG). If aligned, it will copy data word-by-word after first aligning pointers to word boundary. If src and dst are not co-aligned, however, byte-wise copy will be performed. This patch was taken from the Linux kernel patch [1], which has not been applied at the time being. It fixes the memmove and optimises memcpy for misaligned cases. It will first align destination pointer to word-boundary regardless whether src and dest are co-aligned or not. If they indeed are, then wordwise copy is performed. If they are not co-aligned, then it will load two adjacent words from src and use shifts to assemble a full machine word. Some additional assembly level micro-optimisation is also performed to ensure more instructions can be compressed (e.g. prefer a0 to t6). With this patch, U-Boot boots again on SiFive Unleashed board. [1] https://patchwork.kernel.org/project/linux-riscv/patch/20210216225555.4976-1-gary@garyguo.net/ Fixes: 8f0dc4cfd106 ("riscv: assembler versions of memcpy, memmove, memset") Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-17riscv: Fix arch_fixup_fdt always failing without /chosenSean Anderson1-4/+7
If /chosen was missing, chosen_offset would never get updated with the new /chosen node. This would cause fdt_setprop_u32 to fail. This patch fixes this by setting chosen_offset. In addition, log any errors from setting boot-hartid as well. Fixes: 5370478d1c7 ("riscv: Add boot hartid to device tree") Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-05-17riscv: Split SiFive CLINT support between SPL and U-Boot properBin Meng5-5/+13
At present there is only one Kconfig option CONFIG_SIFIVE_CLINT to control the enabling of SiFive CLINT support in both SPL (M-mode) and U-Boot proper (S-mode). So for a typical SPL config that the SiFive CLINT driver is enabled in both SPL and U-Boot proper, that means the S-mode U-Boot tries to access the memory-mapped CLINT registers directly, instead of the normal 'rdtime' instruction. This was not a problem before, as the hardware does not forbid the access from S-mode. However this becomes an issue now with OpenSBI commit 8b569803475e ("lib: utils/sys: Add CLINT memregion in the root domain") that the SiFive CLINT register space is protected by PMP for M-mode access only. U-Boot proper does not boot any more with the latest OpenSBI, that access exceptions are fired forever from U-Boot when trying to read the timer value via the SiFive CLINT driver in U-Boot. To solve this, we need to split current SiFive CLINT support between SPL and U-Boot proper, using 2 separate Kconfig options. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Sean Anderson <seanga2@gmail.com>
2021-05-16arm: octeontx2: Add dtsi/dts files for Octeon TX2 CN913x DBKonstantin Porotchkin11-0/+1004
This patch adds the dtsi/dts files needed to support the Marvell Octeon TX2 CN913x DB. This is only the base port with not all interfaces supported fully. Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-05-16arm64: mvebu: extend the mmio regionGrzegorz Jaszczyk2-2/+4
Some of the setups including cn9130 opens mmio window starting from 0xc0000000, reflect it in the u-boot code. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Kostya Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-05-16arm64: mvebu: a8k: move firmware related definitions to fw infoGrzegorz Jaszczyk1-0/+3
Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-05-16arm64: mvebu: do not map firmware RT service regionGrzegorz Jaszczyk2-1/+24
There is region left by ATF, which needs to remain in memory to provide RT services. To prevent overwriting it by u-boot, do not provide any mapping for this memory region, so any attempt to access it will trigger synchronous exception. Update sr 2021-04-12: Don't update armada3700/cpu.c mmu table, as this has specific changes included in mainline. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-05-16arm64: mvebu: a8k: align memory regionsjinghua1-55/+7
1. RAM: base address 0x0 size 2Gbytes 2. MMIO: base address 0xf0000000 size 1Gbytes Signed-off-by: Ofir Fedida <ofedida@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de>
2021-05-15Merge https://source.denx.de/u-boot/custodians/u-boot-shTom Rini1-0/+1
2021-05-15Merge tag 'u-boot-amlogic-20210514' of ↵Tom Rini2-0/+14
https://source.denx.de/u-boot/custodians/u-boot-amlogic - dts: add missing -u-boot.dtsi to enable HDMI on Beelink GTKing/King-Pro - usb: dwc3-meson-g12a: skip phy on -ENODATA aswell - net: dwmac_meson8b: do not set TX delay in TXID & RXID - net: designware: meson8b: add g12a compatible
2021-05-14ARM: dts: add missing -u-boot.dtsi to enable HDMI on Beelink GTKing/King-ProNeil Armstrong2-0/+14
This lacks the right u-boot specific DT include to make HDMI work. Reported-by: B1oHazard <ty3uk@mail.ua> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-05-14Revert "riscv: cpu: fu740: clear feature disable CSR"Bin Meng1-15/+0
This reverts commit bc8bbb77f74f21582b3bfd790334397757f88575. This commit breaks U-Boot booting on SiFive Unleashed board, as there is no such CSR on U54 core. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>