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2021-06-09arm: imx: imx8mm: clock: make debug output more descriptiveAndrey Zhizhikin1-3/+3
Clock initialization functionality has ambitious debug messages, which are printed out when failures are triggered during execution: - Separate frequency table lookup functions have the the same output that makes it impossible to understand which function failed and produced the output - PLL decoding routine has a generic debug statement printed, which does not state the actual value failed to be found Extend the output for both cases with prefixing table lookup functions output with function name, and report the failed value in PLL decoding routine. Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-06-09Add EV-iMX280-NANO-X-MB boardOleh Kravchenko2-0/+112
A simple prototyping board with one microSD port, one Ethernet port, 2 USB ports, I2C, SPI, GPIO, and UART interfaces. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Stefano Babic <sbabic@denx.de>
2021-06-09Add out4.ru O4-iMX-NANO boardOleh Kravchenko4-0/+344
Board designed for quick prototyping and has one microSD port, 2 Ethernet ports, 2 USB ports, I2C, SPI, CAN, RS-485, GPIO, UART interfaces, and 2 RGB LEDs. Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua> Cc: Stefano Babic <sbabic@denx.de>
2021-06-09ARM: dts: imxrt1050-evk: enable usbotg1 node as hostGiulio Benetti1-0/+5
Enable usbotg1 port node as host usb. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: add usbotg1, usbphy1 and usbmisc nodesGiulio Benetti1-0/+27
Usb is now supported so add all required nodes for it in imxrt1050. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09usb: ehci-mx6: add support for i.MXRTGiulio Benetti1-0/+4
Add support for usb1 and usb2 present on i.IMXRT. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: IMXRT: introduce is_imxrt*() macros and get_cpu_rev()Giulio Benetti3-0/+19
We need those macros to instruct drivers on how to behave for SoC specific quirks, so let's add it as done for other i.MX SoCs. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020: add gpio5 node to this SoCGiulio Benetti1-0/+11
i.MXRT1020 supports gpio5, so let's add a node for it. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: move all u-boot, dm-spl to ↵Giulio Benetti2-10/+34
imxrt1020-evk-u-boot.dtsi file At the moment a lot of u-boot,dm-spl properties are present in board .dts file but this is not correct since u-boot,dm-spl property is u-boot specific and must be listed into the separate imrt1020-evk-u-boot.dtsi file. So let's move every u-boot,dm-spl property present in imxrt1020-evk.dts to imxrt1020-evk-u-boot.dtsi file. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: move all u-boot, dm-spl to ↵Giulio Benetti2-13/+38
imxrt1050-evk-u-boot.dtsi file At the moment a lot of u-boot,dm-spl properties are present in board .dts file but this is not correct since u-boot,dm-spl property is u-boot specific and must be listed into the separate imrt1050-evk-u-boot.dtsi file. So let's move every u-boot,dm-spl property present in imxrt1050-evk.dts to imxrt1050-evk-u-boot.dtsi file. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: remove u-boot,dm-splGiulio Benetti1-1/+0
We don't need lcdif to be enable in SPL, so let's remove u-boot,dm-spl. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: set lcdif clocks according to mxsfb driverGiulio Benetti1-2/+3
Lcdif needs both "pix" and "axi" clocks to be enabled so let's add them to lcdif node. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: move lcdif assigned clock to dtsiGiulio Benetti2-3/+2
Since we assume pll5 is the default lcdif clock source let's move assigned-clocks(-parents) properties to .dtsi file. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: add device_type = "memory" to memory nodeGiulio Benetti1-0/+1
Now device_type = "memory" is mandatory to allow u-boot to read memory node, so let's add it to memory node. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk-u-boot: make gpt1 present for SPLGiulio Benetti1-0/+4
Timer needs to be already enabled in spl, so let's add its node to spl dtb. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: set gpt1 as tick-timer for u-bootGiulio Benetti1-0/+1
Let's set gpt1 as u-boot timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050-evk: enable gpt1 timerGiulio Benetti1-0/+4
Enable gpt1 timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: add gpt1 nodeGiulio Benetti1-0/+8
Add gpt1 node for using it as timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1050: add node label to oscGiulio Benetti1-1/+1
Let's add node label to osc to be used as clock source for other nodes. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: add device_type = "memory" to memory nodeGiulio Benetti1-0/+1
Now device_type = "memory" is mandatory to allow u-boot to read memory node, so let's add it to memory node. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk-u-boot: make gpt1 present for SPLGiulio Benetti1-0/+4
Timer needs to be already enabled in spl, so let's add its node to spl dtb. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: set gpt1 as tick-timer for u-bootGiulio Benetti1-0/+1
Let's set gpt1 as u-boot timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020-evk: enable gpt1 timerGiulio Benetti1-0/+4
Enable gpt1 timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020: add gpt1 nodeGiulio Benetti1-0/+8
Add gpt1 node for using it as timer. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09ARM: dts: imxrt1020: add node label to oscGiulio Benetti1-1/+1
Let's add node label to osc to be used as clock source for other nodes. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-09arm: imxrt: soc: make mpu regions genericGiulio Benetti1-3/+3
This mpu handling works for every i.MXRT SoC that we have, so let's generalize imxrt1050_region_config to imxrt_region_config. Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
2021-06-07stm32mp: don't map the reserved region with no-map propertyPatrick Delaunay1-2/+15
No more map the reserved region with "no-map" property by marking the corresponding TLB entries with invalid entry (=0) to avoid speculative access. The device tree parsing done in lmb_init_and_reserve() takes a long time when it is executed without data cache, so it is called in enable_caches() before to disable it. This patch fixes an issue where predictive read access on secure DDR OP-TEE reserved area are caught by firewall. Series-cc: marex Series-cc: pch Series-cc: marek.bykowski@gmail.com Series-cc: Ard Biesheuvel <ardb@kernel.org> Series-cc: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-07stm32mp: Increase the reserved memory in board_get_usable_ram_topPatrick Delaunay1-2/+5
Add 8M for the U-Boot reserved memory (display, fdt, gd, ...) mapped cacheable before relocation. Without this patch the device tree, located before the MALLOC area is not tagged cacheable just after relocation, before mmu reconfiguration. This patch reduces the duration for device tree parsing in lmb_init_and_reserve. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-06-07Revert "sama5d3: Fix Galois Field Table offsets"Tudor Ambarus1-2/+2
This reverts commit 786f888b743e9b83c9095cb9b5548ebe2e29afc5. Looks like the datasheet at https://ww1.microchip.com/downloads/en/DeviceDoc/SAMA5D3-Series-Data-sheet-DS60001609b.pdf is wrong, and the testing was poorly done, because the PMECC did not raise any error, but also didn't correct any bitflips. Restoring the offsets as they were before, makes the PMECC on sama5d3x capable of correcting bitflips. Fixes: 786f888b74 ("sama5d3: Fix Galois Field Table offsets") Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2021-06-05sandbox: correct determination of the text baseHeinrich Schuchardt1-1/+4
os_find_text_base() assumes that first line of /proc/self/maps holds information about the text. Hence we must call the function before calling os_malloc() which calls mmap(0x10000000,). Failure to do so has led to incorrect values for pc_reloc when an exception was reported => exception undefined Illegal instruction pc = 0x5628d82e9d3c, pc_reloc = 0x5628c82e9d3c as well as incorrect output of the bdinfo command => bdinfo relocaddr = 0x0000000007858000 reloc off = 0x0000000010000000 Fixes: b308d9fd18fa ("sandbox: Avoid using malloc() for system state") Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-06-04arm: a37xx: pci: Increase PCIe MEM size from 16 MiB to 127 MiBPali Rohár1-3/+10
For some configurations with more PCIe cards and PCIe bridges, 16 MiB of PCIe MEM space may not be enough. Since TF-A already allocates a 128 MiB CPU window for PCIe, and since IO port space is only 64 KiB in total, use all the remaining space (64 + 32 + 16 + 8 + 4 + 2 + 1 = 127 MiB) for PCIe MEM. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04arm: a37xx: pci: Fix a3700_fdt_fix_pcie_regions() functionPali Rohár1-14/+60
Current version of this function uses a lot of incorrect assumptions about the `ranges` DT property: * parent(#address-cells) == 2 * #size-cells == 2 * number of entries == 2 * address size of first entry == 0x1000000 * second child address entry == base + 0x1000000 Trying to increase PCIe MEM space to more than 16 MiB leads to an overlap with PCIe IO space, and trying to define additional MEM space (as a third entry in the `ranges` DT property) causes U-Boot to crash when booting the kernel. ## Flattened Device Tree blob at 04f00000 Booting using the fdt blob at 0x4f00000 Loading Device Tree to 000000001fb01000, end 000000001fb08f12 ... OK ERROR: board-specific fdt fixup failed: <unknown error> - must RESET the board to recover. Fix a3700_fdt_fix_pcie_regions() to properly parse and update all addresses in the `ranges` property according to https://elinux.org/Device_Tree_Usage#PCI_Address_Translation Now it is possible to increase PCIe MEM space from 16 MiB to maximal value of 127 MiB. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Fixes: cb2ddb291ee6 ("arm64: mvebu: a37xx: add device-tree fixer for PCIe regions") Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04arm: a37xx: pci: Find PCIe controller node by compatible instead of pathPali Rohár1-3/+1
Find PCIe DT node by compatible string instead of retrieving it by using hardcoded DT path. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-06-04arm: a37xx: pci: Fix DT compatible string to Linux' DT compatiblePali Rohár1-1/+1
Change DT compatible string for A3700 PCIe from 'marvell,armada-37xx-pcie' to 'marvell,armada-3700-pcie' to make U-Boot A3700 PCIe DT node compatible with Linux' DT node. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-05-31Merge https://source.denx.de/u-boot/custodians/u-boot-riscvTom Rini19-1/+2525
- SiFive FU740 and Unmatched support
2021-05-31riscv: cpu: fu740: clear feature disable CSRGreen Wan1-0/+15
Clear feature disable CSR to turn on all features of hart. The detail is specified at section, 'SiFive Feature Disable CSR', in user manual https://sifive.cdn.prismic.io/sifive/aee0dd4c-d156-496e-a6c4-db0cf54bbe68_sifive_U74MC_rtl_full_20G1.03.00_manual.pdf Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31board: sifive: add HiFive Unmatched board supportGreen Wan1-0/+4
Add defconfig and board support for HiFive Unmatched. Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31riscv: dts: add SiFive Unmatched board supportGreen Wan4-0/+1790
Add dts files for SiFive Unmatched board. Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31riscv: dts: add fu740 supportGreen Wan2-0/+434
Add dts support for fu740. The HiFive Unmatched support is based on fu740 cpu and drivers in following patch set. Signed-off-by: Green Wan <green.wan@sifive.com> [greentime.hu: set fu740 speed to 1.2GHz] Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
2021-05-31drivers: clk: add fu740 supportGreen Wan1-1/+1
Add fu740 support. One abstract layer is added for supporting multiple chips such as fu540 and fu740. Signed-off-by: Green Wan <green.wan@sifive.com>
2021-05-31riscv: cpu: fu740: Add support for cpu fu740Green Wan12-0/+281
Add SiFive fu740 cpu to support RISC-V arch Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-05-31sunxi: Bring back SD card as MMC device 0Andre Przywara1-0/+1
Commit 2243d19e5618 ("mmc: mmc-uclass: Use dev_seq() to read aliases node's index") now actually enforces U-Boot's device enumeration policy, where explicitly named devices come first, then any other non-named devices follow, without filling gaps. For quite a while we have had an "mmc1 = &mmc2;" alias in our sunxi-u-boot.dtsi, which now leads to the problem that the SD card (which was always mmc device 0) now gets to be number 2. This breaks quite some boot scripts, including our own distro boot commands, and some other features looking at $mmc_bootdev, also fastboot. Just add an explicit mmc0 alias in the very same file to fix this and restore the old behaviour. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reported-by: Samuel Holland <samuel@sholland.org> Tested-by: Simon Baatz <gmbnomis@gmail.com>
2021-05-28arm: dts: stm32mp157c-odyssey-som: enable the RNG1Grzegorz Szymaszek1-0/+4
Enable the true random number generator. It can be used, for example, to generate partition UUIDs when partitioning with the gpt command. The generator is already enabled in the device trees of several other STM32MP1‐based boards, like DKx or DHCOM. Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-05-27Merge tag 'ti-v2021.07-rc4' of ↵Tom Rini3-0/+16
https://source.denx.de/u-boot/custodians/u-boot-ti - Fix reset for AM64 platforms - Enable networking PHY driver for AM64 - Fix default R5F cluster setting in J7
2021-05-27arm: dts: k3-am642-sk: Add sysreset controller nodeSuman Anna1-0/+4
The AM64x SoC uses a central Device Management and Security Controller (DMSC) processor that manages all the low-level device controls including the system-wide SoC reset. The system-wide reset is managed through the system reset driver. Add a sysreset controller node as a child of the dmsc node to enable the "reset" command from U-Boot prompt for the K3 AM642 SK. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-27arm: dts: k3-am642-evm: Add sysreset controller nodeSuman Anna1-0/+4
The AM64x SoC uses a central Device Management and Security Controller (DMSC) processor that manages all the low-level device controls including the system-wide SoC reset. The system-wide reset is managed through the system reset driver. Add a sysreset controller node as a child of the dmsc node to enable the "reset" command from U-Boot prompt for the K3 AM642 EVM. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-27arm: dts: k3-j721e: Fix up MAIN R5FSS cluster mode back to Split-modeSuman Anna1-0/+8
The default U-Boot environment variables and design are all set up for both the MAIN R5FSS clusters to be in Split-mode. This is the setting in v2021.01 U-Boot and the dt nodes are synched with the kernel binding property names in commit 468ec2f3ef8f ("remoteproc: k3_r5: Sync to upstreamed kernel DT property names") merged in v2021.04-rc2. The modes for both the clusters got switched back to LockStep mode by mistake in commit 70e167495ab2 ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot") also in v2021.04-rc2. This throws the following warning messages when early-booting the cores using default env variables, k3_r5f_rproc r5f at 5d00000: Invalid op: Trying to start secondary core 7 in lockstep mode Load Remote Processor 3 with data at addr=0x82000000 98484 bytes: Failed! k3_r5f_rproc r5f at 5f00000: Invalid op: Trying to start secondary core 9 in lockstep mode Load Remote Processor 5 with data at addr=0x82000000 98484 bytes: Failed! Fix this by switching back both the clusters to the expected Split-mode. Make this mode change in the u-boot specific dtsi file to avoid such sync overrides in the future until the kernel dts is also switched to Split-mode by default. Fixes: 70e167495ab2 ("arm: dts: k3-j721e: Sync Linux v5.11-rc6 dts into U-Boot") Reported-by: Minas Hambardzumyan <minas@ti.com> Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2021-05-27powerpc: fix regression in arch_initr_trap()Matt Merhar1-0/+1
The assembly output of the arch_initr_trap() function differed by a single byte after common.h was removed from traps.c: fff49a18 <arch_initr_trap>: fff49a18: 94 21 ff f0 stwu r1,-16(r1) fff49a1c: 7c 08 02 a6 mflr r0 fff49a20: 90 01 00 14 stw r0,20(r1) -fff49a24: 80 62 00 44 lwz r3,68(r2) +fff49a24: 80 62 00 38 lwz r3,56(r2) fff49a28: 4b ff 76 19 bl fff41040 <trap_init> fff49a2c: 80 01 00 14 lwz r0,20(r1) fff49a30: 38 60 00 00 li r3,0 fff49a34: 38 21 00 10 addi r1,r1,16 fff49a38: 7c 08 03 a6 mtlr r0 This was causing a consistent hard lockup during the MMC read / loading of the QoriQ FMan firmware on a P2041RDB board. Re-adding the header causes identical assembly to be emitted and allows the firmware loading and subsequent boot to succeed. Fixes: 401d1c4f5d ("common: Drop asm/global_data.h from common header") Signed-off-by: Matt Merhar <mattmerhar@protonmail.com>
2021-05-25MIPS: remove deprecated qemu_mips boardDaniel Schwierzeck1-11/+0
Remove qemu_mips boards because DM migration doesn't make sense. The board support for qemu_mips is already marked as deprecated in Qemu in favour of the Malta board. Also qemu_mips support has been removed from Linux a long time ago. The official replacement is the Malta board. The same Malta U-Boot image can be used with Qemu and on physical hardware. All combinations of Big Endian and Little Endian as well as 32 bit and 64 bit are supported. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
2021-05-24ARM: don't use --gc-sections with LTO when using private libgccMarek Behún1-0/+2
When using LTO, we can throw away the --gc-sections flag, but only if using private libgcc. When using system's libgcc, --gc-sections is still needed, otherwise linking will fail due to undefined references to libc's symbols. Signed-off-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-22 17:51:26 +0300