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2021-03-08arm: socfpga: Move Stratix10 and Agilex to use TARGET_SOCFPGA_SOC64Siew Chin Lim4-7/+10
Create common macro TARGET_SOCFPGA_SOC64 for Stratix10 and Agilex. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-05ppc: qemu: Move board directory from board/freescale to board/emulationBin Meng1-1/+1
board/emulation is the place for other QEMU targets like x86, arm, riscv. Let's move the qemu-ppce500 board codes there. List me as a co-maintainer for this board. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05gpio: mpc8xxx: Support controller register physical address beyond 32-bitBin Meng1-1/+1
dev_read_addr_size_index() returns fdt_addr_t which might be a 64-bit physical address. This might be true for some 85xx SoCs whose CCSBAR is mapped beyond 4 GiB. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: mpc85xx: Add 'gpibe' register to 'struct ccsr_gpio'Bin Meng1-0/+1
Without this, the DM GPIO driver for MPC8xxx does not compile for MPC85xx SoCs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: io.h: Use addrmap_ translation APIs only in post-relocation phaseBin Meng1-6/+9
In phys_to_virt() and virt_to_phys(), if CONFIG_ADDR_MAP is defined, they use addrmap_ translation APIs to do the address translation. However these APIs only work in post-relocation phase. Update the code logic to fall back to use the default one when in pre-relocation phase. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05ppc: mpc85xx: Wrap LAW related codes with CONFIG_FSL_LAWBin Meng2-0/+4
LAW related codes should be wrapped with CONFIG_FSL_LAW. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05configs: fsl: move via specific defines to KconfigRajesh Bhagat1-0/+6
Moves below via specific defines to Kconfig: CONFIG_FSL_VIA Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-05configs: fsl: move bootrom specific defines to KconfigRajesh Bhagat2-2/+10
Moves below bootrom specific defines to Kconfig: CONFIG_SYS_FSL_BOOTROM_BASE CONFIG_SYS_FSL_BOOTROM_SIZE Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-04Merge tag 'next-2021-03-04' of ↵Tom Rini1-4/+5
https://gitlab.denx.de/u-boot/custodians/u-boot-video into next - convert sunxi_display to DM_VIDEO
2021-03-03gpio: Add a way to read 3-way strapping pinsSimon Glass1-1/+4
Using the internal vs. external pull resistors it is possible to get 27 different combinations from 3 strapping pins. Add an implementation of this. This involves updating the sandbox GPIO driver to model external and (weaker) internal pull resistors. The get_value() method now takes account of what is driving a pin: sandbox: GPIOD_EXT_DRIVEN - in which case GPIO_EXT_HIGH provides the value outside source - in which case GPIO_EXT_PULL_UP/DOWN indicates the external state and we work the final state using those flags and the internal GPIOD_PULL_UP/DOWN flags Of course the outside source does not really exist in sandbox. We are just modelling it for test purpose. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-03gpio: sandbox: Track whether a GPIO is drivenSimon Glass1-1/+2
Add a new flag to keep track of whether sandbox is driving the pin, or whether it is expecting an input signal. If it is driving, then the value of the pin is the value being driven (0 or 1). If not driving, then we consider the value 0, since we don't currently handle things like pull-ups yet. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-03gpio: x86: Drop the deprecated methods in intel_gpioSimon Glass1-0/+5
We don't need to implement direction_input() and direction_output() anymore. Drop them and use update_flags() instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-03gpio: sandbox: Use a separate flag for the valueSimon Glass1-0/+5
At present with the sandbox GPIO driver it is not possible to change the value of GPIOD_IS_OUT_ACTIVE unless the GPIO is an output. This makes it hard to test changing the flags since we need to be aware of the internal workings of the driver. The feature is designed to aid testing. Split this feature out into a separate sandbox-specific flag, so that the flags can change unimpeded. This will make it easier to allow updating the flags in a future patch. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-03gpio: sandbox: Rename GPIO dir_flags to flagsSimon Glass1-4/+4
Adjust the terminology in this driver to reflect that fact that all flags are handled, not just direction flags. Create a new access function to get the full GPIO state, not just the direction flags. Drop the static invalid_dir_flags since we can rely on a segfault if something is wrong. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-03Merge tag 'u-boot-imx-20210303' of ↵Tom Rini34-11/+5644
https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX for 2021.04 ---------------- - new boards: - i.MX8MN Beacon EmbeddedWorks (2GB) - Gateworks Venice imx8mm - convert to DM: - imx53-qsb, mx53loco, mx51evk, mx23-evk - Fixes : - Network : FEC ethernet quirks - DH dh-imx6 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6597
2021-03-03board: gateworks: imx8mm: Add Gateworks Venice board supportTim Harvey7-0/+382
Add initial support for Gateworks Venice product family based on the i.MX 8M Mini SoC Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-03-03arm: dts: imx8mm: add Gateworks i.MX8 Mini Dev kitsTim Harvey8-0/+1415
Add Gateworks i.MX 8M Mini Development kits from Linux-5.12-rc1 Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-03-03video: sunxi_display: Convert to DM_VIDEOJagan Teki1-4/+5
DM_VIDEO migration deadline is already expired, but around 80 Allwinner boards are still using video in a legacy way: ===================== WARNING ====================== This board does not use CONFIG_DM_VIDEO Please update the board to use CONFIG_DM_VIDEO before the v2019.07 release. Failure to update by the deadline may result in board removal. See doc/driver-model/migration.rst for more info. ==================================================== Convert the legacy video driver over to the DM_VIDEO framework. This is a minimal conversion: it doesn't use the DT for finding its resources, nor does it use DM clocks or DM devices for the outputs (LCD, HDMI, CVBS). Tested in Bananapi M1+ Plus 1920x1200 HDMI out. (Jagan) Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> [Andre: rebase and smaller fixes] Signed-off-by: Andre Przywara <andre.przywara@arm.com> Acked-by: Maxime Ripard <mripard@kernel.org> Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-03arm: omap3: Compile s_init() function only when it is usedPali Rohár1-0/+3
Function s_init() is called only from lowlevel_init(). So compile it only when function lowlevel_init() is compiled. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
2021-03-03arm: omap3: Compile lowlevel_init() function only when it is usedPali Rohár1-1/+5
Function lowlevel_init() is called only from cpu_init_crit() and this function is wrapped into #if .. #endif section. So compile also lowlevel_init() function under same #if condition. Function cpy_clk_code() uses lowlevel_init symbol to get address where go_to_speed code ends. As this symbol is not available anymore when compiling with CONFIG_SKIP_LOWLEVEL_INIT, defines a new label go_to_speed_end at the place where go_to_speed code ends. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Lukasz Majewski <lukma@denx.de> Acked-by: Pavel Machek <pavel@ucw.cz>
2021-03-02sandbox: Write out bloblist when exitingSimon Glass1-0/+5
Sandbox provides a way to write out its emulated memory on exit. This makes it possible to pass a bloblist from one phase (e.g. SPL) to the next. However the bloblist is not closed off, so the checksum is generally invalid. Fix this by finishing up the bloblist before writing the memory file. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-02sandbox: Avoid using malloc() for system stateSimon Glass4-29/+35
This state is not accessible to the running U-Boot but at present it is allocated in the emulated SDRAM. This doesn't seem very useful. Adjust it to allocate from the OS instead. The RAM buffer is currently not freed, but should be, so add that into state_uninit(). Update the comment for os_free() to indicate that NULL is a valid parameter value. Note that the strdup() in spl_board_load_image() is changed as well, since strdup() allocates memory in the RAM buffer. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-02sandbox: Add os_realloc()Simon Glass1-0/+48
We provide os_malloc() and os_free() but not os_realloc(). Add this, following the usual semantics. Also update os_malloc() to behave correctly when passed a zero size. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-02s5p4418_nanopi2: Drop dead codeSimon Glass2-146/+0
This code is still using the old command typedef. It was not noticed since this file is not currently built. It is using a non-existent option in the Makefile. Drop this file since it is not needed for correct operation. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-02arm: remove set_dacr/get_dacr functionsPatrick Delaunay1-14/+0
Remove the unused function set_dacr/get_dacr Serie-cc: Ard Biesheuvel <ardb@kernel.org> Serie-cc: R Sricharan <r.sricharan@ti.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02arm: cp15: remove weak function arm_init_domainsPatrick Delaunay3-10/+0
Remove the unused weak function arm_init_domains used to change the DACR value. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02arm: omap2: remove arm_init_domainsPatrick Delaunay1-17/+0
Remove the arm_init_domains and the DACR update, as it is now done in ARMv7 CP15 level. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02arm: cp15: update DACR value to activate access controlPatrick Delaunay1-2/+5
Update the initial value of Domain Access Control Register (DACR) and set by default the access permission to client (DACR_Dn_CLIENT = 1U) for each of the 16 domains and no more to all-supervisor (DACR_Dn_MANAGER = 3U). This patch allows to activate the domain checking in MMU against the permission bits in the translation tables and avoids prefetching issue on ARMv7 [1]. Today it was already done for OMAP2 architecture ./arch/arm/mach-omap2/omap-cache.c::arm_init_domains introduced by commit de63ac278cba ("ARM: mmu: Set domain permissions to client access") which fixes lot of speculative prefetch aborts seen on OMAP5 secure devices. [1] https://developer.arm.com/documentation/ddi0406/b/System-Level-Architecture/Virtual-Memory-System-Architecture--VMSA-/Memory-access-control/The-Execute-Never--XN--attribute-and-instruction-prefetching Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com> Reported-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02arm: cosmetic: align TTB_SECT define valuePatrick Delaunay1-1/+1
Align TTB_SECT define value with previous value. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02arm: remove TTB_SECT_XN_MASK in DCACHE_WRITETHROUGHPatrick Delaunay1-1/+1
The normal memory (other that DCACHE_OFF) should be executable by default, only the device memory (DCACHE_OFF) used for peripheral access should have the bit execute never (TTB_SECT_XN_MASK). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02stm32mp: update the mmu configuration for SPL and prerelocPatrick Delaunay1-10/+30
Overidde the weak function dram_bank_mmu_setup() to set the DDR (preloc case) or the SYSRAM (in SPL case) executable before to enable the MMU and configure DACR. This weak function is called in dcache_enable/mmu_setup. This patchs avoids a permission access issue when the DDR is marked executable (by calling mmu_set_region_dcache_behaviour with DCACHE_DEFAULT_OPTION) after MMU setup and domain access permission activation with DACR in dcache_enable. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02stm32mp: update MMU config before the relocationPatrick Delaunay1-4/+9
Mark the top of ram, used for relocated U-Boot as a normal memory (cacheable and executable) to avoid permission access issue when U-Boot jumps to this relocated code. When MMU is activated in pre-reloc stage; only the beginning of DDR is marked executable. This patch avoids access issue when DACR is correctly managed. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-02reset: Remove addr parameter from reset_cpu()Harald Seiler64-71/+71
Historically, the reset_cpu() function had an `addr` parameter which was meant to pass in an address of the reset vector location, where the CPU should reset to. This feature is no longer used anywhere in U-Boot as all reset_cpu() implementations now ignore the passed value. Generic code has been added which always calls reset_cpu() with `0` which means this feature can no longer be used easily anyway. Over time, many implementations seem to have "misunderstood" the existence of this parameter as a way to customize/parameterize the reset (e.g. COLD vs WARM resets). As this is not properly supported, the code will almost always not do what it is intended to (because all call-sites just call reset_cpu() with 0). To avoid confusion and to clean up the codebase from unused left-overs of the past, remove the `addr` parameter entirely. Code which intends to support different kinds of resets should be rewritten as a sysreset driver instead. This transformation was done with the following coccinelle patch: @@ expression argvalue; @@ - reset_cpu(argvalue) + reset_cpu() @@ identifier argname; type argtype; @@ - reset_cpu(argtype argname) + reset_cpu(void) { ... } Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-02Revert "lpc32xx: cpu: add support for soft reset"Harald Seiler1-16/+5
This reverts commit 576007aec9a4a5f4f3dd1f690fb26a8c05ceb75f. The parameter passed to reset_cpu() no longer holds a meaning as all call-sites now pass the value 0. Thus, branching on it is essentially dead code and will just confuse future readers. Revert soft-reset support and just always perform a hard-reset for now. This is a preparation for removal of the reset_cpu() parameter across the entire tree in a later patch. Fixes: 576007aec9a4 ("lpc32xx: cpu: add support for soft reset") Cc: Sylvain Lemieux <slemieux@tycoint.com> Signed-off-by: Harald Seiler <hws@denx.de>
2021-03-02nds32: Remove dead reset_cpu() implementationHarald Seiler1-22/+0
nds32 is one of the only architectures which still have a reset_cpu() implementation that makes use of the `addr` parameter. The rest of U-Boot now ignores it and passes 0 everywhere. It turns out that even here, reset_cpu() is no longer referenced anywhere; reset is either not implemented (e.g. ae3xx) or realized using a WDT (e.g. ag101). Remove this left-over implementation in preparation for the removal of the `addr` parameter in the entire tree. Cc: Rick Chen <rick@andestech.com> Signed-off-by: Harald Seiler <hws@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Rick Chen <rick@andestech.com>
2021-03-02pinctrl: at91-pio4: add support for slew-rateClaudiu Beznea1-0/+1
SAMA7G5 supports slew rate configuration. Adapt the driver for this. For switching frequencies lower than 50MHz the slew rate needs to be enabled. Since most of the pins on SAMA7G5 fall into this category enabled the slew rate by default. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2021-03-01ARM: imx: Include u-boot.img in u-boot-with-spl.imx if OF_SEPARATE=yMarek Vasut1-2/+2
The u-boot-with-spl.imx is a concatenation of SPL and u-boot.uim. The u-boot.uim is u-boot.bin wrapped in uImage. In case OF_SEPARATE is enabled, the u-boot.bin does not contain control DT for U-Boot, and so u-boot.uim does not contain the DT, and so u-boot-with-spl.imx does not contain the DT, and a system where u-boot-with-spl.imx is written to offset 1024B to the start of storage no longer boots, as it is missing DT. In case OF_SEPARATE is enabled, u-boot.img contains both u-boot.bin and the necessary DTs. Therefore, use u-boot.img instead of u-boot.uim to generate u-boot-with-spl.imx when OF_SEPARATE is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Christoph Niedermaier <cniedermaier@dh-electronics.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Simon Glass <sjg@chromium.org> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: uboot-imx <uboot-imx@nxp.com>
2021-03-01ARM: imx: Do not hard-code MX8M MMU table DRAM entry offsetMarek Vasut1-3/+16
Instead of hard-coding the offset of DRAM entries in MMU table all over the code, auto-detect the offset. This removes error-prone code which would break e.g. in case the MMU table is modified. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Ye Li <ye.li@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-03-01ARM: dts: imx8mq-evk: Remove u-boot,off-on-delay-us propertyFabio Estevam1-4/+0
Commit 247bbeb74c18 ("ARM: dts: imx8m: increase off-on delay on the SD Vcc regulator") caused the imx8mq-evk board to not be able to store the environment variables in the SD card. Remove the u-boot,off-on-delay-us property to fix the regression. Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
2021-03-01arm: dts: imx8mp-evk: Add FEC PHY reset timingYe Li1-0/+2
Add phy-reset-duration and phy-reset-post-delay to FEC node for PHY reset, otherwise the PHY does not work correctly. Signed-off-by: Ye Li <ye.li@nxp.com>
2021-03-01ARM: imx: Add missing FEC ethernet quirk for MX8MMarek Vasut1-0/+1
The MX8M also contains a gigabit MAC, so define FEC_QUIRK_ENET_MAC. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-03-01mx23evk: Convert to driver modelFabio Estevam4-1/+22
Make the conversion to driver model as it is mandatory. Successfully tested booting Linux from the SD card. Dropped splash screen support as this needs to be properly converted to DM and tested. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01mx23-evk: Import devicetree file from LinuxFabio Estevam3-0/+1114
Import the imx23-evk devicetree files from Linux kernel version 5.11. This is in preparation for converting the mx23evk_defconfig target to driver model. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01mx51evk: Convert to driver modelFabio Estevam1-0/+3
Make the conversion to driver model as it is mandatory. Tested booting the Linux kernel from the SD card. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01imx51-babbage: Import devicetree files from LinuxFabio Estevam3-0/+2148
Import the imx51-babbage devicetree files from Linux kernel version 5.11-rc7. This is in preparation for converting the mx51evk_defconfig target to driver model. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01ARM: dts: imx53-qsb: Describe the esdhc1 card detect pinFabio Estevam1-0/+2
The micro SD card slot uses GPIO3_13 as card detect pin, so describe it in the devicetree. This was noticed when converting imx53-qsb board to driver model in U-Boot as the micro SD card was not getting detected. After this change it is possible to load the dtb and zImage from the SD card and boot Linux. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01mx53loco: Convert to driver modelFabio Estevam1-0/+1
Make the conversion to driver model as it is mandatory. Remove the SATA support for now as the i.MX53 support has not been added yet. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01imx53-qsb: Import devicetree files from LinuxFabio Estevam2-0/+496
Import the imx53-qsb devicetree files from Linux kernel version 5.11-rc7. This is in preparation for converting the mx53loco_defconfig target to driver model. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-03-01board: toradex: move RGMII delays to PHY sideOleksandr Suvorov2-2/+2
The RGMII link delays can be set on either MAC or PHY side. Set the rgmii-id PHY mode for FEC and remove FEC_ENET_ENABLE_.XC_DELAY setting, so that these definitions aren't used anymore throughout the U-Boot. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
2021-03-01ARM: imx8: Add missing FEC ENET quirk for i.MX8/i.MX8XOleksandr Suvorov1-0/+2
Both NXP SoCs i.MX8 and i.MX8X have ENET gigabit MAC. Define FEC_QUIRK_ENET_MAC for the imx8 platform and remove this definition from configs of boards, based on MX8/MX8X. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com> Acked-by: Marek Vasut <marex@denx.de> Reviewed-By: Ramon Fried <rfried.dev@gmail.com> Acked-by: Oliver Graute <oliver.graute@kococonnector.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>