summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Collapse)AuthorFilesLines
2021-03-26x86: Define a region for device priv/plat dataSimon Glass1-0/+8
Collect this together in one place, so driver model can access set it up in a new place if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26sandbox: Define a region for device priv/plat dataSimon Glass1-0/+8
Collect this together in one place, so driver model can access set it up in a new place if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26Revert "sandbox: Disable I2C emulators in SPL"Simon Glass1-7/+3
With recent changes this can be supported again. Add it back. This reverts commit d85f2c4f2970d0ec2f5f075de734afd11200d153. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26sandbox: i2c: Move platdata structs to header filesSimon Glass2-0/+39
At present the structs used by these drivers are declared in the C files and so are not accessible to dtoc. Move them to header files, as required. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26clk: sandbox: Create a special fixed-rate driverSimon Glass2-1/+9
Create a version of this driver for sandbox so that it can use the of-platdata struct. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-26clk: sandbox: Move priv/plat data to a header fileSimon Glass1-0/+16
At present the structs used by this driver are not accessible outside it, so cannot be used with OF_PLATDATA_INST. Move them to a header file to fix this. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-24Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini1-0/+8
- Bug fixes related to FSL-IFC, watchdog - layerscape-pcie, flexspi, T2080rdb.
2021-03-23powerpc: t2080rdb: Enable RTC supportChris Packham1-0/+8
The T2080RDB has a ds1339 on i2c0. Add this to the devicetree and enable the relevant support in the configs. Signed-off-by: Chris Packham <judge.packham@gmail.com> Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2021-03-23arm: socfpga: Only do 'is OS booted from FIT' checking when VAB is enabledSiew Chin Lim1-1/+2
Check CONFIG_SOCFPGA_SECURE_VAB_AUTH before perform 'is OS booted from FIT' checking in board_prep_linux function. And, fix typo of CONFIG_SOCFPGA_SECURE_VAB_AUTH_ALLOW_NON_FIT_IMAGE. CONFIG_FIT will be enabled in both ATF and VAB boot flow, thus, board_prep_linux function will always be called by both ATF and VAB boot flow. board_pre_linux function will do 'is OS booted from FIT' checking, and it will be called before board_fit_image_post_process function. VAB boot flow expects the OS is always booted from FIT and with VAB signed cerfiticate because the VAB authentication is implemented in board_fit_image_post_process function. So, VAB needs the 'is OS booted from FIT' checking in board_pre_linux function. However, for ATF boot flow, it is not a requirement that the OS must always booted from FIT. The OS can be booted from individual Image and kernel dtb file. Thus, we should not do 'if OS is booted from FIT' checking in board_prep_linux function. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
2021-03-22ARM: mach-at91: arm926ejs: fix data abort in startup returning from ↵Martin Townsend1-8/+8
lowlevel_init The startup code in arm/cpu/arm926ejs preserves the link register across the call to lowlevel_init by using r4: mov r4, lr /* perserve link reg across call */ bl lowlevel_init /* go setup pll,mux,memory */ mov lr, r4 /* restore link */ The lowlevel_init function for at91 machines based on the same CPU uses r4 and hence corrupts it causing a data abort when it returns to the startup code. This patch fixes this by using r6 instead of r4 in the lowlevel_init function. Discovered and the fix was tested on a AT91SAM9261 based board. Signed-off-by: Martin Townsend <martin@rufilla.com> Reviewed-by: Eugen Hristev <eugen.hristev@microchip.com>
2021-03-22sandbox: Drop debug message in os_spl_to_uboot()Simon Glass1-1/+0
This is not needed in normal operation. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-03-22sandbox: i2c: Rename driver names to work with of-platdataSimon Glass1-2/+2
Some of these do not follow the rules. Make sure the driver name matches the compatible string in all cases. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22sandbox: Make sandbox,emul more conventionalSimon Glass1-1/+5
At present this property is a phandle but does not have a #xxx-cells property to match it. Add one so that is works the same as gpio and clock phandles. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-22sandbox: enable cros-ec-keyb in test.dtbHeinrich Schuchardt1-0/+1
Currently keyboard input fails in the GUI window opened by ./u-boot -T -l Add the missing include to test.dts. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-20board: mt7629: enable compression of u-boot to reduce the size of final imageWeijie Gao2-19/+0
This patch makes use of the decompression mechanism implemented for mt7628 previously to reduce the total image size. Binman will be also removed. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20dts: mt7629: enable JTAG pins by defaultWeijie Gao2-0/+16
The EPHY LEDs belongs to the built-in FE switch of MT7629, which is barely used. These LED pins on reference boards are used as JTAG socket. So it's a good idea to change the default state to JTAG, and this will make it convenience for debugging. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2021-03-20board: Add MT8183 pumpkin board supportFabien Parent3-0/+101
Add the MT8183 pumpkin board support. Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-20ARM: mediatek: Add MT8183 supportFabien Parent5-0/+367
Add the MT8183 SoC support. Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-20board: mediatek: rename pumpkin board into mt8516Fabien Parent1-1/+1
More than one pumpkin board has been made with different MediaTek SoCs. Rename the pumpkin board to follow the naming convention of all other MediaTek boards and also to not be confusing when other pumpkin boards will be added in follow-up commits. Signed-off-by: Fabien Parent <fparent@baylibre.com>
2021-03-16board: silinux: Enable recovery SPL for EK874 boardLad Prabhakar1-1/+1
Enable building SPL for EK874 board which is based on R8A774C0 SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16arm: rmobile: Add Silicon Linux EK874 board supportLad Prabhakar7-0/+625
The EK874 development kit from Silicon Linux is made of CAT874 (the main board) and CAT875 (the sub board that goes on top of CAT874). This patch adds the required board support to boot Si-Linux EK874 board based on R8A774C0 SoC. DTS files apart from r8a774c0-ek874-u-boot.dts and r8a774c0-u-boot.dtsi have been imported from Linux kernel 5.11 commit f40ddce88593 ("Linux 5.11"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16pinctrl: renesas: Add support for R8A774C0Lad Prabhakar1-0/+1
Renesas RZ/G2E (a.k.a. r8a774c0) is pin compatible with R-Car E3 (a.k.a. r8a77990), however it doesn't have several automotive specific peripherals. This patch hooks R8A774C0 SoC with the pfc driver. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16arm: dts: r8a774c0: Resync R8A774C0 SoC DTSI with Linux 5.11Lad Prabhakar1-4/+23
Resync the R8A774C0 SoC DTSI with Linux kernel 5.11 commit f40ddce88593 ("Linux 5.11"). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16arm: rmobile: Add HopeRun HiHope RZ/G2H board supportBiju Das4-0/+88
The HiHope RZ/G2H board from HopeRun consists of main board (HopeRun HiHope RZ/G2H main board) and sub board(HopeRun HiHope RZ/G2H sub board). The HiHope RZ/G2H sub board sits below the HiHope RZ/G2H main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2H board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16arm: rmobile: Add HopeRun HiHope RZ/G2N board supportBiju Das4-0/+82
The HiHope RZ/G2N board from HopeRun consists of main board (HopeRun HiHope RZ/G2N main board) and sub board(HopeRun HiHope RZ/G2N sub board). The HiHope RZ/G2N sub board sits below the HiHope RZ/G2N main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2N board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16arm: rmobile: Add HopeRun HiHope RZ/G2M board supportBiju Das2-0/+15
The HiHope RZ/G2M board from HopeRun consists of main board (HopeRun HiHope RZ/G2M main board) and sub board(HopeRun HiHope RZ/G2M sub board). The HiHope RZ/G2M sub board sits below the HiHope RZ/G2M main board. This patch adds the required board support to boot HopeRun HiHope RZ/G2M board. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-03-16arm: dts: rmobile: r8a774e1: Synchronize DTs with Linux 5.11Biju Das2-0/+61
Synchronize r8a774e1 device trees with Linux 5.11, commit f40ddce88593482919 ("Linux 5.11"). Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-16arm: dts: rmobile: r8a774b1: Synchronize DTs with Linux 5.11Biju Das2-0/+62
Synchronize r8a774b1 device trees with Linux 5.11, commit f40ddce88593482919 ("Linux 5.11") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
2021-03-15Merge tag 'v2021.04-rc4' into nextTom Rini73-199/+6191
Prepare v2021.04-rc4
2021-03-15Merge tag 'u-boot-stm32-20210312' of ↵Tom Rini10-59/+101
https://source.denx.de/u-boot/custodians/u-boot-stm - Add WATCHDOG_RESET() in MTD framework and STM32 QSPI driver - stm32mp1_trusted_defconfig rely on SCMI support - Remove the nand MTD configuration for NOR boot in stm32mp1 board - STM32programmer update - Bsec: manage clock when present in device tree - stm32mp15: move bootdelay configuration in defconfig - Update for stm32 dsi and dw_mipi_dsi - STM32 MCU's cleanup - Fix compilation issue depending on SYS_DCACHE_OFF and SYS_ICACHE_OFF flags - Update stm32mp1 doc
2021-03-14sandbox: imply SCP03 and CMD_SCP03Igor Opaniuk1-0/+2
Enable by default SCP_03/CMD_SCP03 for sandbox target. Signed-off-by: Igor Opaniuk <igor.opaniuk@foundries.io> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-03-12sandbox: Update os_find_u_boot() to find the .img fileSimon Glass2-4/+6
At present this function can only locate the u-boot ELF file. For SPL it is handy to be able to locate u-boot.img since this is what would normally be loaded by SPL. Add another argument to allow this to be selected. While we are here, update the function to load SPL when running in TPL, since that is the next stage. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12test: Allow SPL to run any available testSimon Glass1-2/+5
At present SPL only runs driver model tests. Update it to run all available tests, i.e. in any test suite. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12test: Rename test-main.c to test-dm.cSimon Glass1-1/+1
This is the main test function for driver model but not for other tests. Rename the file and the function so this is clear. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12sandbox: Drop the 'starting...' messageSimon Glass1-1/+0
This message is annoying since it is only useful for testing. Drop it and update the test to cope. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-03-12arm: stm32mp: Fix compilation issue when SYS_DCACHE_OFF and/or ↵Patrice Chotard1-2/+4
SYS_DCACHE_SYS are enabled Fix following compilation issue when SYS_DCACHE_OFF and/or SYS_DCACHE_SYS are enabled : arch/arm/mach-stm32mp/cpu.c: In function ‘early_enable_caches’: arch/arm/mach-stm32mp/cpu.c:223:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_size’ 223 | gd->arch.tlb_size = PGTABLE_SIZE; | ^ arch/arm/mach-stm32mp/cpu.c:224:10: error: ‘volatile struct arch_global_data’ has no member named ‘tlb_addr’ 224 | gd->arch.tlb_addr = (unsigned long)&early_tlb; | ^ Signed-off-by: Patrice Chotard <patrice.chotard@st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-03-12arm: mvebu: a38x: Remove dead code ARMADA_39XPali Rohár4-106/+1
Config option ARMADA_39X is never set so remove all dead code hidden under ifdef CONFIG_ARMADA_39X blocks. Also remove useless checks for CONFIG_ARMADA_38X define as this macro is always defined for a38x code path. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Stefan Roese <sr@denx.de>
2021-03-11stm32mp: bsec: manage clock when present in device treePatrick Delaunay1-0/+10
Enable the clocks during bsec probe when they are present in device tree. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11stm32mp: stm32prog: replace alias by serial device sequence numberPatrick Delaunay2-30/+10
The command "stm32prog serial <dev>" can directly use the device sequence number of serial uclass as this sequence number is egual to alias when it exist; this assumption simplify the code and avoid access to gd->fdt_blob and the device tree parsing. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11stm32mp: stm32prog: reactivate console and display serial errorPatrick Delaunay1-4/+10
When serial instance is not found in device tree, the console should be enabled and the error should be indicated. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11stm32mp: stm32prog: Add CONFIG_CMD_STM32PROG_SERIAL and _USBPatrick Delaunay6-12/+50
Add CONFIG_CMD_STM32PROG_SERIAL and CONFIG_CMD_STM32PROG_USB to independently select the support of UART or USB communication for STM32CubeProgrammer. For serial boot over UART, user can deactivate CONFIG_CMD_STM32PROG_SERIAL to use U-Boot console of binary loaded by UART (for board bring-up for example). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11stm32mp: stm32prog: Add Kconfig file for stm32prog commandPatrick Delaunay2-17/+19
Move CONFIG_CMD_STM32PROG in a specific Kconfig file for stm32prog command. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-11ARM: dts: stm32mp1: explicit clock reference needed by RCC clock driverEtienne Carriere1-0/+4
Define in the RCC clock provider node which root clocks the driver depends on. These are root oscillators, which may be present or not, upon FDT content. This update binding is introduced in Linux kernel device tree by patch "ARM: dts: stm32: move clocks/resets to SCMI resources for stm32mp15" This patch is a preliminary step for SCMI support of stm32mp15 boards with trusted boot chain, based on TF-A or OP-TEE. Signed-off-by: Etienne Carriere <etienne.carriere@st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-03-09x86: Select advanced Intel code only if allowedSimon Glass2-0/+16
At present most of the Intel-specific code is built on all devices, even those which don't have software support for the features provided there. This means that any board can enable CONFIG_INTEL_ACPIGEN even if it does not have the required features. Add a new INTEL_SOC option to control this access. This must be selected by SoCs that can support the required features. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed a typo in arch/x86/Kconfig] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09x86: Move INTEL_ACPIGEN to arch/x86Simon Glass1-0/+9
This option is better placed in the x86 code since it is not generic enough to be in the core code. Move it. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed a typo in arch/x86/Kconfig] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09x86: Fix member check in intel_gnvsSimon Glass1-0/+4
When CONFIG_CHROMEOS is not enabled this currently does not build. Fix it. Reported-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-09x86: sizeof-array-div error in lpc_common_early_initHeinrich Schuchardt1-1/+1
Building qemu-x86_64_defconfig with GCC 11.0 fails with: arch/x86/cpu/intel_common/lpc.c: In function ‘lpc_common_early_init’: arch/x86/cpu/intel_common/lpc.c:56:40: error: expression does not compute the number of elements in this array; element type is ‘struct reg_info’, not ‘u32’ {aka ‘unsigned int’} [-Werror=sizeof-array-div] 56 | sizeof(values) / sizeof(u32)); | ^ arch/x86/cpu/intel_common/lpc.c:56:40: note: add parentheses around the second ‘sizeof’ to silence this warning arch/x86/cpu/intel_common/lpc.c:50:11: note: array ‘values’ declared here 50 | } values[4], *ptr; | ^~~~~~ Add parentheses to silence warning. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2021-03-08arm: socfpga: dts: soc64: Update filename in binman node of FIT image with ↵Siew Chin Lim1-0/+22
VAB support FIT image of Vendor Authentication Coot (VAB) contains signed images. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08arm: socfpga: cmd: Support 'vab' commandSiew Chin Lim2-0/+35
Support 'vab' command to perform vendor authentication. Command format: vab addr len Authorize 'len' bytes starting at 'addr' via vendor public key Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-03-08arm: socfpga: soc64: Support Vendor Authorized Boot (VAB)Siew Chin Lim6-4/+308
Vendor Authorized Boot is a security feature for authenticating the images such as U-Boot, ARM trusted Firmware, Linux kernel, device tree blob and etc loaded from FIT. After those images are loaded from FIT, the VAB certificate and signature block appended at the end of each image are sent to Secure Device Manager (SDM) for authentication. U-Boot will validate the SHA384 of the image against the SHA384 hash stored in the VAB certificate before sending the image to SDM for authentication. Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-30 07:04:22 +0300