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2021-01-05x86: apl: Drop support for !OF_PLATDATA_PARENTSimon Glass2-28/+1
This code was kept around after of-platdata started supporting parent devices. That feature seems stable now, so let's drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-01-05serial: Update NS16550_t and struct NS16550Simon Glass2-2/+2
Typedefs should not be used in U-Boot and structs should be lower case. Update the code to use struct ns16550 consistently. Put a header guard on the file while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-12-31fsp: Move and rename fsp_types.h fileSughosh Ganu2-63/+2
The fsp_types.h header file contains macros for building signatures of different widths. These signature macros are architecture agnostic, and can be used in all places which use signatures in a data structure. Move and rename the fsp_types.h under the common include header. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-22fsp: Move and rename fsp_types.h fileSughosh Ganu2-63/+2
The fsp_types.h header file contains macros for building signatures of different widths. These signature macros are architecture agnostic, and can be used in all places which use signatures in a data structure. Move and rename the fsp_types.h under the common include header. Signed-off-by: Sughosh Ganu <sughosh.ganu@linaro.org> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-19x86: Drop unnecessary mp_init logicSimon Glass3-18/+9
Now that sequence numbers are set up when devices are bound, this code is not needed. Also, we should use dev_seq() instead of req_seq. Update the whole file accordingly. Also fix up APL cpu while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-19dm: Avoid accessing seq directlySimon Glass2-2/+2
At present various drivers etc. access the device's 'seq' member directly. This makes it harder to change the meaning of that member. Change access to go through a function instead. The drivers/i2c/lpc32xx_i2c.c file is left unchanged for now. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-16x86: edison: Switch to DM_USB_GADGETAndy Shevchenko2-4/+8
DM is the modern default approach for the drivers in U-Boot. It also allows to configure code via Device Tree. Move Intel Edison to use DM_USB_GADGET and drop hard coded values. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16x86: edison: Use dwc3-generic driver for Intel EdisonAndy Shevchenko2-0/+7
Use generic Synopsys DesignWare 3 driver on Intel Edison. For now it's just a stub which allows future refactoring. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16x86: edison: BINMAN selection is specific to the boardAndy Shevchenko1-1/+0
The platforms based on Intel Tangier may have different requirements how to create bootloader bundle to supply to a device. Currently the BINMAN approach is for Intel Edison only. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16x86: edison: Add CPU to compatible stringAndy Shevchenko1-1/+1
Like in the rest of x86 boards append CPU to the board compatible string. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16x86: tangier: Find proper memory region for relocationAndy Shevchenko1-0/+43
It appears that U-Boot works by luck on Intel Edison board because the amount of RAM is less than 1 GB and standard way of calculating the top of it work for this configuration. However, this won't work if the amount of RAM is different and split differently in address space. We have to find the suitable window correctly. Find proper memory region for relocation by scanning MMAP SFI table in board_get_usable_ram_top() callback. According to the address map documentation the Main Memory is guaranteed to lie in the 0..2 GB range, that's why we limit search by this range. Fixes: e71de54a4943 ("x86: Add Intel Tangier support") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: fixed a typo in the commit message] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-16x86: zimage: Update cmdline parameter to be an env varSimon Glass1-7/+8
With the updated changes to bootargs substitution[1], the zboot command needs to be updated to get its command line from an environment variable instead of a memory address. This is because the command-line string must be updated to convert %U to ${uuid}, etc. In any case it is more flexible to use a environment variable and it is best to do this before the release to avoid a subsequent change. Update the command accordingly. [1] http://patchwork.ozlabs.org/project/uboot/list/?series=212481 Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-12-14dm: treewide: Rename ..._platdata variables to just ..._platSimon Glass17-45/+45
Try to maintain some consistency between these variables by using _plat as a suffix for them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Update 'auto' declarations to be on one lineSimon Glass1-2/+1
Fix up the code style for those declarations that should now fit onto one line, which is all of them that currently do not. This is needed for dtoc to detect the structs correctly, at present. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename ofdata_to_platdata() to of_to_plat()Simon Glass10-23/+22
This name is far too long. Rename it to remove the 'data' bits. This makes it consistent with the platdata->plat rename. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename dev_get_platdata() to dev_get_plat()Simon Glass6-13/+13
Rename this to be consistent with the change from 'platdata'. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-14dm: treewide: Rename 'platdata' variables to just 'plat'Simon Glass16-24/+24
We use 'priv' for private data but often use 'platdata' for platform data. We can't really use 'pdata' since that is ambiguous (it could mean private or platform data). Rename some of the latter variables to end with 'plat' for consistency. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: treewide: Rename auto_alloc_size members to be shorterSimon Glass14-18/+18
This construct is quite long-winded. In earlier days it made some sense since auto-allocation was a strange concept. But with driver model now used pretty universally, we can shorten this to 'auto'. This reduces verbosity and makes it easier to read. Coincidentally it also ensures that every declaration is on one line, thus making dtoc's job easier. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: Remove uses of device_bind_offset()Simon Glass1-1/+1
This function is not needed since the standard device_bind() can be used instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-13dm: core: Rename device_bind() to device_bind_offset()Simon Glass1-1/+1
This function is not necessary anymore, since device_bind_ofnode() does the same thing and works with both flattree and livetree. Rename it to indicate that it is special. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-05x86: zimage: Add silent-console processingSimon Glass1-0/+14
At present zimage does its own command-line processing and does not support the 'silent console' feature. There doesn't seem to be any good reason for this. Add support for silent console to zimage. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-11-10x86: coral: Update smbios tables to latest definitionSimon Glass1-6/+21
The accepted binding uses multiple nodes, one for each table type. Update coral accordingly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-10x86: Avoid using hardcoded number of variable range MTRRs in mtrr_commit()Bin Meng1-1/+1
Since commit 29d2d64ed55f ("x86: Add support for more than 8 MTRRs"), the maximum number of variable range MTRRs was increased from 8 to 10. On the BayTrail platform there are only 8 variable range MTRRs. In mtrr_commit() it still uses MTRR_MAX_COUNT which caused a #GP during VESA video driver probe. It should have been updated to use dynamically probed number. This fixes the boot failure seen on Intel Minnow Max board. Fixes: 29d2d64ed55f ("x86: Add support for more than 8 MTRRs") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-11-06x86: Provide default SMBIOS manufacturer/productSimon Glass15-0/+60
Add a file containing defaults for these, using the existing CONFIG options. This file must be included with #include since it needs to be passed through the C preprocessor. Enable the driver for all x86 boards that generate SMBIOS tables. Disable it for coral since it has its own driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: reword the commit message a little bit] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: galileo: Use devicetree for SMBIOS settingsSimon Glass1-0/+28
Add settings and enable the default sysinfo driver so that these can come from the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: zimage: Quieten down the zimage boot processSimon Glass1-5/+6
Much of the output is not very useful. The bootm command is quite a bit quieter. Convert some output to use log_debug(). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-11-06x86: zimage: Sanity-check the kernel version before printing itSimon Glass1-0/+9
With Chrome OS the kernel setup block is stored in a separate place from the kernel, so it is not possible to access the kernel version string. At present, garbage is printed. Add a sanity check to avoid this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: zimage: Add a little more loggingSimon Glass1-0/+6
Add logging for each part of the boot process, using a new Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Igor Opaniuk <igor.opaniuk@toradex.com>
2020-11-06x86: fsp: Adjust calculations for MTRR range and DRAM topSimon Glass1-13/+22
At present the top of available DRAM is the same as the top of the range of the low-memory MTRR. In fact, U-Boot is allowed to use memory up until the start of the FSP reserved memory. Use that value for low_end, since it makes more memory available. Keep the same calculation as before for mtrr_top, i.e. the top of reserved memory. A side-effect of this change is that the E820 tables have a single entry that extends from the bottom of the memory used by U-Boot to the bottom of the FSP reserved memory. This includes the bloblist, if ACPI tables are placed there. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: acpi: Don't show the UART address by defaultSimon Glass1-1/+1
This is useful when using Linux's earlycon since the MMIO address must be provided on some platforms, e.g.: earlycon=uart8250,mmio32,0xddffc000,115200n8 However this is only for debugging, so don't show it by default. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: acpi: Include the TPMv1 table only if neededSimon Glass1-8/+11
This table is not needed if a v2 TPM is in use. Add a condition to avoid adding it when not needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: Silence some logging statementsSimon Glass5-11/+11
Quite a few log_info() calls are included in the x86 code which should use log_debug() instead. Convert them to reduce unwanted output. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: fsp: Convert fsp_dram to use log_debug()Simon Glass1-2/+6
Use log_debug() instead of debug() in this file, to enable the extra features. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: Set up Chrome OS to boot into developer modeSimon Glass1-6/+20
Set up a few fields necessarily to make Chrome OS boot without showing a firmware error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: Use CONFIG_CHROMEOS_VBOOT for verified bootSimon Glass5-7/+5
At present CONFIG_CHROMEOS is used to determine whether verified boot is in use. The code to implement that is not in U-Boot mainline. However, it is useful to be able to boot a Chromebook in developer mode in U-Boot mainline without needing the verified boot code. To allow this, use CONFIG_CHROMEOS_VBOOT to indicate that verified boot should be used, and CONFIG_CHROMEOS to indicate that the board supports Chrome OS. That allows us to define CONFIG_CHROMEOS on coral. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: Define the Chrome OS GNVS regionSimon Glass1-1/+50
It is not possible to boot Chrome OS properly without passing some basic information from U-Boot. This applies even if verified boot is not being used. Add a structure definition for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06acpi: Don't reset the tables with every new generationSimon Glass1-0/+1
At present if SSDT and DSDT code is created, only the latter is retained for examination by the 'acpi items' command. Fix this by only resetting the list when explicitly requested. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: acpi: Put the generated code first in DSDTSimon Glass1-9/+18
The current implementation for DSDT tables is not correct for the case where there is generated code, as the length ends up being incorrect. Also, we want the generated code to go first in the table. Rewrite this piece to correct these problems. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: acpi: Allow the SSDT to be emptySimon Glass1-7/+15
If there is nothing in the SSDT we should not include it in the tables. Update the implementation to check this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: Show the interrupt pointer with 'irqinfo'Simon Glass3-7/+27
It is useful for this command to show the address of the interrupt table. Add support for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: nhlt: Fix a few bugs in the table generationSimon Glass1-1/+3
At present these tables do not have the correct header, and there is an occasional incorrect value due to uninited data. Fix these bugs. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: nhlt: Correct output of bytes and 16-bit dataSimon Glass1-3/+10
At present these functions are incorrect. Fix them and add some logging and checking to avoid future problems. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-06x86: Allow putting some tables in the bloblistSimon Glass1-3/+46
At present all tables are placed starting at address f0000 in memory, and can be up to 64KB in size. If the tables are very large, this may not provide enough space. Also if the tables point to other tables (such as console log or a ramoops area) then we must allocate other memory anyway. The bloblist is a nice place to put these tables since it is contiguous, which makes it easy to reserve this memory for linux using the 820 tables. Add an option to put some of the tables in the bloblist. For SMBIOS and ACPI, create suitable pointers from the f0000 region to the new location of the tables. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: squashed in http://patchwork.ozlabs.org/project/uboot/patch/ 20201105062407.1.I8091ad931cbbb5e3b6f6ababdf3f8d5db0d17bb9@changeid/] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05x86: Use if instead of #ifdef in write_tables()Simon Glass1-19/+19
Use if() to remove the extra build path in this code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05x86: Add SMBIOS info for CoralSimon Glass1-0/+8
This is required by Chrome OS so that the audio and other unibuild features work correctly. Add it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05x86: coral: Drop the duplicate PCIe settingsSimon Glass1-2/+0
These settings are included twice. The second lot are correct, so drop the others. Signed-off-by: Simon Glass <sjg@chromium.org> Reported-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05x86: Don't bother clearing global NVSSimon Glass1-1/+0
The bloblist guarantees that blobs are zeroed so there is no need to do an additional memset(). Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05x86: acpi: Store the ACPI context in global_dataSimon Glass1-1/+6
At present we create the ACPI context but then drop it after generation of tables is complete. This is annoying because we have to then search for tables later. To fix this, allocate the context and store it in global_data. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05x86: Allow writing tables to failSimon Glass3-3/+15
At present write_tables() can fail but does not report this problem to its caller. Fix this by changing the return type. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-11-05x86: Add support for private filesSimon Glass1-0/+4
Some boards need to include binary data into the image for use during the boot process. Add a node for these. An example is the audio-codec configuration used by some audio drivers on Intel platforms. If no private files are provided, they will be omitted. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-24 06:32:38 +0300