starfive-tech/u-boot.git - StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2024-05-03	riscv: dubhe: Update SBI_EXT_CACHE ID	Ley Foon Tan	1	-1/+1
2024-05-03	riscv: dts: dubhe: Add Dubhe *-u-boot.dtsi	Ley Foon Tan	4	-1/+87
2024-05-03	riscv: dts: dubhe: Remove dubhe_fpga_secure.dts	Ley Foon Tan	1	-266/+0
2024-05-03	riscv: dts: dubhe: Sync device tree from Linux	Ley Foon Tan	10	-227/+600
2024-04-05	riscv: dts: dubhe: Add root node compatible string	Ji Sheng Teoh	3	-0/+12
2024-03-24	arch: riscv: dts: dubhe: Add binman node to support Dubhe-90/80/70	Ji Sheng Teoh	2	-1/+97
2024-03-24	board: starfive: dubhe: Boot Dubhe-90/80/70 based on MARCHID	Ji Sheng Teoh	1	-0/+14
2024-03-24	arch: riscv: dts: dubhe: Add Dubhe-90/80/70 device tree	Ji Sheng Teoh	9	-44/+218
2023-10-21	arch: riscv: dts: dubhe-fpga-u-boot.dtsi: Update dts for Dubhe	Wei Liang Lim	1	-14/+28
2023-10-21	configs: starfive_dubhe_fpga_defconfig: Enable Dubhe SMP	Wei Liang Lim	1	-1/+3
2023-10-21	arch: riscv: dts: dubhe: Update dts for Dubhe	Wei Liang Lim	2	-25/+57
2023-10-21	arch: riscv: dts: dubhe-fpga-u-boot.dtsi: Update CPU1 node	Wei Liang Lim	1	-0/+4
2023-10-20	arch: riscv: dts: dubhe_fpga: Update dts for Dubhe	Wei Liang Lim	2	-88/+27
2023-10-19	riscv: dubhe: Set SYS_CACHELINE_SIZE 64	Wei Liang Lim	1	-0/+3
2023-10-19	arch: riscv: dts: dubhe_fpga.dts: Add static MAC address in dts	Wei Liang Lim	1	-0/+1
2023-10-19	dubhe: dwc_eth_qos: Fix errors and set the speed to 10M on FPGA	Wei Liang Lim	2	-0/+18
2023-10-19	drivers: net: dwc_eth_qos: Add GMAC support for Dubhe	Wei Liang Lim	2	-6/+93
2023-10-19	arch: riscv: dubhe: Update Dubhe support	Wei Liang Lim	3	-1/+27
2023-10-18	Enable MMC support, FAT and EXT4 commands	Wei Liang Lim	1	-0/+4
2023-10-18	Enabling Dubhe FPGA secure boot	Wei Liang Lim	4	-72/+339
2023-10-18	Add DDR driver framework	woonjiet.chong	1	-0/+9
2023-10-18	Add cpu dubhe	woonjiet.chong	5	-0/+85
2023-10-18	Enable SPL, OpenSBI and U-Boot proper boot flow for Dubhe FPGA	woonjiet.chong	5	-0/+323
2023-09-26	riscv: set fdtfile on VisionFive 2	Heinrich Schuchardt	1	-0/+1
2023-09-05	risc-v: implement DBCN write byte	Heinrich Schuchardt	2	-0/+17
2023-09-05	riscv: cpu: jh7110: Imply SPL_SYS_MALLOC_CLEAR_ON_INIT	Shengyu Qu	1	-0/+1
2023-09-05	riscv: jh7110: enable riscv,timer in the device tree	Torsten Duwe	1	-0/+9
2023-08-22	riscv: cpu: make riscv_cpu_probe to EVT_DM_POST_INIT_R callback	Chanho Park	1	-8/+3
2023-08-15	common: return type board_get_usable_ram_top	Heinrich Schuchardt	4	-4/+4
2023-08-10	riscv: cpu: jh7110: Select SPL_ZERO_MEM_BEFORE_USE	Shengyu Qu	1	-0/+1
2023-08-10	riscv: Add SPL_ZERO_MEM_BEFORE_USE implementation	Shengyu Qu	2	-25/+12
2023-08-10	riscv: Kconfig: Add SPL_ZERO_MEM_BEFORE_USE	Shengyu Qu	1	-0/+8
2023-08-10	riscv: starfive: Add SYS_CACHE_SHIFT_6 to enable SYS_CACHELINE_SIZE	Minda Chen	1	-0/+1
2023-08-10	riscv: dts: starfive: Enable pcie0 dts node	Minda Chen	1	-1/+1
2023-08-10	cmd/sbi: display new extensions	Heinrich Schuchardt	1	-0/+2
2023-08-02	acpi: Add missing RISC-V acpi_table header	Heinrich Schuchardt	1	-0/+11
2023-08-02	riscv: dts: starfive: Enable PCIe host controller	Mason Huo	2	-0/+85
2023-07-24	riscv: define a cache line size for the generic CPU	Heinrich Schuchardt	1	-0/+1
2023-07-24	riscv: dts: jh7110: Add clock source from PLL	Xingyu Wu	3	-6/+9
2023-07-24	riscv: dts: jh7110: Add PLL clock controller node	Xingyu Wu	1	-1/+7
2023-07-24	riscv: setup per-hart stack earlier	Bo Gan	1	-13/+24
2023-07-12	riscv: dts: t-head: Add basic device tree for Sipeed Lichee PI 4A board	Yixun Lan	4	-0/+473
2023-07-12	riscv: t-head: licheepi4a: initial support added	Yixun Lan	1	-0/+5
2023-07-12	riscv: Rename SiFive CLINT to RISC-V ALINT	Bin Meng	9	-21/+21
2023-07-12	riscv: clint: Update the sifive clint ipi driver to support aclint	Bin Meng	2	-1/+24
2023-07-12	ram: starfive: Read memory size information from EEPROM	Yanhong Wang	1	-1/+31
2023-07-12	riscv: dts: starfive: Add support eeprom device tree node	Yanhong Wang	2	-0/+20
2023-07-12	eeprom: starfive: Enable ID EEPROM configuration	Yanhong Wang	1	-0/+13
2023-07-12	riscv: dts: jh7110: Combine the board device tree files of 1.2A and 1.3B	Yanhong Wang	5	-86/+26
2023-07-12	riscv: dts: jh7110: Add ethernet device tree nodes	Yanhong Wang	2	-0/+103