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2021-08-09arm: imx8ulp: Allocate DCNANO and MIPI_DSI to AD domainYe Li1-0/+2
Configure DCNANO and MIPI_DSI to be controlled by AD for single boot Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: iMX8ULP: Add boot device relevant functionsYe Li2-0/+85
Read from ROM API to get current boot device. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: Probe the S400 MU device in arch initYe Li1-1/+34
Need probe the S400 MU device in arch_cpu_init_dm, so we can use S400 API in u-boot Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09imx8ulp: unify rdc functionsPeng Fan3-173/+317
Unify rdc function to rdc.c Update soc.c to use new rdc function Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: release trdc and assign lpav from RTD to APDPeng Fan1-1/+103
Rlease LPAV from RTD to APD Release gpu2D/3D to APD Set TRDC MBC2 MEM1 for iomuxc0 access Since upower depends AP/M33 SW to configure IOMUX for its PMIC i2c and MODE pins. we have to open iomuxc0 access for A35 core (domain 7) in single boot. Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09arm: imx8ulp: add trdc release requestPeng Fan1-9/+17
Add TRDC release request, then we could configure resources to be accessible by A35 Domain. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: add rdc supportPeng Fan3-1/+147
There is xrdc inside i.MX8ULP, we need to configure permission to make sure AP non-secure world could access the resources. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: release and configure XRDC at early phaseYe Li3-8/+98
Since S400 will set the memory of SPL image to R/X. We can't write to any data in SPL image. 1. Set the parameters save/restore only for u-boot, not for SPL. to avoid write data. 2. Not use MU DM driver but directly call MU API to send release XRDC to S400 at early phase. 3. Configure the SPL image memory of SRAM2 to writable (R/W/X) Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09drivers: misc: s400_api: Update API for fuse read and writeYe Li1-1/+6
Add API to support fuse read and write Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09drivers: misc: imx8ulp: Update S400 API for release RDCYe Li1-1/+1
The RDC API is updated to add a field for XRDC or TRDC Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09drivers: misc: imx8ulp: Add S400 API for image authenticationYe Li1-1/+7
Add S400 API for image authentication Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: Update the reset vector in u-bootYe Li1-13/+22
Because we have set reset vector to ATF in SPL, have to set it back to ROM for any reset in u-boot Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: disable wdog3Peng Fan1-1/+35
Disable wdog3 which is configured by ROM Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: Enable full L2 cache in SPLYe Li1-0/+34
SRAM2 is half L2 cache and default to SRAM after system boot. To enable the full l2 cache (512KB), it needs to reset A35 to make the change happen. So re-implement the jump entry function in SPL: 1. configure the core0 reset vector to entry (ATF) 2. enable the L2 full cache 3. reset A35 So when core0 up, it runs into ATF. And we have 512KB L2 cache working. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: soc: Change to use CMC1 to get bootcfgYe Li1-1/+1
CMC1 also has a MR register for bootcfg Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09arm: imx8ulp: add clock supportPeng Fan9-4/+1558
Add i.MX8ULP clock support Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09driver: misc: Add MU and S400 API to communicate with SentinelYe Li2-0/+35
Add MU driver and S400 API. Need enable MISC driver to work Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09arm: imx: move container Kconfig under mach-imxPeng Fan2-13/+13
Since i.MX8 and i.MX8ULP reuse common container, so move the Kconfig public to both. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: add container supportYe Li7-47/+177
i.MX8ULP support using ROM API to load container image, it use same ROM API as i.MX8MN/MP, and use same container format as i.MX8QM/QXP. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx: parse-container: guard included header filesPeng Fan1-0/+2
Guard included sci.h with CONFIG_AHAB_BOOT to avoid build failure for i.MX8ULP Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8: Move container image header file to mach-imxYe Li5-4/+4
Since the container is shared among i.MX platforms, move its header file to mach-imx Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8: Move container parser and image to mach-imx common folderYe Li4-3/+4
Since we will re-use the container parser on imx8ulp, move the codes to mach-imx Signed-off-by: Ye Li <ye.li@nxp.com>
2021-08-09arm: imx: basic i.MX8ULP supportPeng Fan12-4/+514
Add basic i.MX8ULP support For the MMU part, Using a simple way the calculate the MMU size to avoid default heavy calcaulation. And align address and size in the table settings to 2MB or 4GB as much as possible. So we can reduce the 4K page allocations in MMU table which will spends much time in create the page table Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09imx: imx8ulp: add get reset causePeng Fan1-0/+69
Add get reset cause function to show what triggerred reset. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx8ulp: support print cpu infoPeng Fan2-0/+61
Support print cpu info. the clock function has not been added, it will be added in following patches. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx: sys_proto: move boot mode define to common headerPeng Fan2-9/+10
These defines could be reused by i.MX8ULP, so move them to common header. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx: add i.MX8ULP cpu type and helperPeng Fan4-0/+27
Add i.MX8ULP cpu type and helpers. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09arm: imx: add i.MX8ULP basic Kconfig optionPeng Fan2-0/+27
Add i.MX8ULP related basic Kconfig option, which will be used later. Signed-off-by: Peng Fan <peng.fan@nxp.com>
2021-08-09mx28evk: Convert to driver modelFabio Estevam2-0/+11
Make the conversion to driver model as it is mandatory. Successfully tested booting Linux from the SD card. Dropped support for networking and splash screen as these need to be properly converted to DM and tested. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-08-09board: ge: bx50v3: Add PCIe reset to DTSebastian Reichel1-0/+10
Add PCIe reset gpio to the Bx50v3 devicetree and get get rid of CONFIG_PCIE_IMX_PERST_GPIO. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2021-08-09board: gateworks: venice: add imx8mm-gw7902 supportTim Harvey3-0/+1008
The GW7902 is based on the i.MX 8M Mini / Nano SoC featuring: - LPDDR4 DRAM - eMMC FLASH - Gateworks System Controller - LTE CAT M1 modem - USB 2.0 HUB - M.2 Socket with USB2.0, PCIe, and dual-SIM - IMX8M FEC - PCIe based GbE - RS232/RS485/RS422 serial transceiver - GPS - CAN bus - WiFi / Bluetooth - MIPI header (DSI/CSI/GPIO/PWM/I2S) - PMIC Do the following to add support for it: - add dts - add PMIC config Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09arm: dts: imx8mm-venice-gw7901: use common u-boot dtsiTim Harvey1-34/+1
Use the common imx8mm-u-boot.dtsi Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09arm: dts: imx8mm-venice-gw700x: fix fifo-depth phy propsTim Harvey1-2/+1
Replace the deprecated 'tx-fifo-depth' and 'rx-fifo-depth' properties not supported by U-Boot drivers/net/phy/dp83867.c with the proper 'ti,fifo-depth' property. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09arm: dts: imx8mm-venice-gw71xx: fix USB OTG VBUSTim Harvey1-2/+3
The GW71xx has a USB Type-C connector with USB 2.0 signaling. GPIO1_12 is the power-enable to the TPS25821 Source controller and power switch responsible for monitoring the CC pins and enabling VBUS. Therefore GPIO1_12 must always be enabled and the vbus output enable from the IMX8MM can be ignored. To fix USB OTG VBUS enable a pull-up on GPIO1_12 to always power the TPS25821 and change the regulator output to GPIO1_10 which is unconnected. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09imx: ventana: remove hard-coded USB OTG pinmuxTim Harvey4-0/+4
pinmux is now done via dt. Add missing OTG_OC pinmux for boards that use it. Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-09imx: ventana: fix UMS supportTim Harvey12-24/+24
The Gateworks Ventana boards have always had usb0=usbh1 and usb1=usbotg because OTG is often subloaded on these boards and a bit in the EEPROM which flagging that OTG is subloaded is used to remove the dt node via the alias. U-Boot DM_USB UMS requires the usb0 alias be assigned to the usbotg so fix the usb0 alias in order for UMS to work. Fixes 72c46327f03f: ("imx: ventana: enable dm support for USB") Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2021-08-08Revert "arm: bootm: Disable LMB reservation for command line and board info ↵Jan Kiszka1-2/+0
on arm64" This reverts commit 2359fa7a87848626bcbd3399e92c657595880cd7. While the goal is valid and there is surely unused memory in that area, we also have a lot of crucial things still located at the top-of-memory while running lmb_alloc_base. Such things are the page table (tlb_addr), relocated U-Boot and the active stack. Possibly more. So this patch was premature, we will need relocations of those things first if we want to use the range. Fixes booting on the IOT2050, but likely also on other boards. It got stuck on relocating the FDT - over the relocated U-Boot code. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2021-08-08ARM: renesas: Turn on PIE for Gen3Marek Vasut1-0/+1
Turn on PIE, so that the U-Boot binary can be started from any arbitrary location in DRAM instead of a predefined fixed one. Note that this patch is not setting SYS_TEXT_BASE=0x0 yet, since that triggers relocation bugs in env code that are yet to be fixed. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Biju Das <biju.das.jz@bp.renesas.com> Cc: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2021-08-06pci: arm: mvebu: Drop DM_PCI check from arch_early_init_rSimon Glass1-3/+2
We don't need this check anymore since when PCI is enabled, driver model is always used. Use CONFIG_PCI instead. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Correct macro usage) Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-06imx28-evk: Import devicetree file from LinuxFabio Estevam1-0/+360
Import the imx28-evk devicetree files from Linux kernel version 5.11-rc7. This is in preparation for converting the mx28evk_defconfig target to driver model. Signed-off-by: Fabio Estevam <festevam@gmail.com>
2021-08-06pci: imx: Drop DM_PCI check from cpu driverSimon Glass1-4/+0
We don't need this check anymore since when PCI is enabled, driver model is always used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-03Merge https://source.denx.de/u-boot/custodians/u-boot-samsungTom Rini3-18/+2
2021-08-02global: Convert simple_strtoul() with decimal to dectoul()Simon Glass9-13/+13
It is a pain to have to specify the value 10 in each call. Add a new dectoul() function and update the code to use it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02global: Convert simple_strtoul() with hex to hextoul()Simon Glass18-62/+62
It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-01Merge https://source.denx.de/u-boot/custodians/u-boot-sunxiTom Rini2-2/+13
- Move the PSCI runtime code for H3/A23/A33 into SRAM - Pick the environment from the actual MMC boot device (SD card vs. eMMC) - Plus a small improvement from Icenowy, just for good measure.
2021-08-01sunxi: decide the inclusion of SCP by SCP_ADDR existenceIcenowy Zheng1-2/+2
There are more Allwinner SoCs that do not have a SCP now. When there's no SCP_ADDR macro defined, we can assume there's no SCP available. Drop the scp part of FIT description when SCP_ADDR does not exist. Signed-off-by: Icenowy Zheng <icenowy@sipeed.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-08-01sunxi: A23/A33/H3: Move sun8i secure monitor to SRAM A2Samuel Holland1-0/+11
So far for the H3, A23, and A33 SoCs, we use DRAM to hold the secure monitor code (providing PSCI runtime services). And while those SoCs do not have the secure SRAM B like older SoCs, there is enough (secure) SRAM A2 to put the monitor code and data in there instead. Follow the design of 64-bit SoCs and use the first part for the monitor, and the last 16 KiB for the SCP firmware. With this change, the monitor no longer needs to reserve a region in DRAM. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> [Andre: amend commit message, fix R40 and V3s build] Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-07-31arm: mvebu: Load U-Boot proper binary in SPL code based on kwbimage headerPali Rohár2-22/+205
Now that proper load and execution addresses are set in v1 kwbimage we can use it for loading and booting U-Boot proper. Use the new spl_parse_board_header() function to implement parsing the kwbimage v1 header. Use information from this header to locate offset and size of the U-Boot proper binary, instead of using the legacy U-Boot header which is prepended to the U-Boot proper binary stored at fixed offset. This has the advantage that we do not need to relay on legacy U-Boot header anymore and therefore U-Boot proper binary can be stored at any offset, as is the case when loading & booting U-Boot proper by BootROM. The CONFIG_SYS_U_BOOT_OFFS option is therefore not used by SPL code anymore. Also allow to compile U-Boot SPL without CONFIG_SPL_SPI_FLASH_SUPPORT, CONFIG_SPL_MMC_SUPPORT or CONFIG_SPL_SATA_SUPPORT set. In this case BootROM is used for loading and executing U-Boot proper. This reduces the size of U-Boot's SPL image. By default these config options are enabled and so BootROM loading is not used. In some cases BootROM reads from SPI NOR at lower speed than U-Boot SPL. So people can decide whether they want to have smaller SPL binary at the cost of slower boot. Therefore dependency on CONFIG_SPL_DM_SPI, CONFIG_SPL_SPI_FLASH_SUPPORT, CONFIG_SPL_SPI_LOAD, CONFIG_SPL_SPI_SUPPORT, CONFIG_SPL_DM_GPIO, CONFIG_SPL_DM_MMC, CONFIG_SPL_GPIO_SUPPORT, CONFIG_SPL_LIBDISK_SUPPORT, CONFIG_SPL_MMC_SUPPORT, CONFIG_SPL_SATA_SUPPORT and CONFIG_SPL_LIBDISK_SUPPORT is changed from strict to related "imply" (which can be selectivelly turned off and causes booting via BootROM). Options CONFIG_SYS_SPI_U_BOOT_OFFS, CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR and CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_DATA_PART_OFFSET have to to be set to zero as they define the location where kwbimage header starts. It is the location where BootROM expects start of the kwbimage from which it reads, parses and executes SPL part. The same applies to option CONFIG_SPL_SATA_RAW_U_BOOT_SECTOR, which has to be set to one. Update all config files to set correct values of these options and set CONFIG_SYS_U_BOOT_OFFS to the correct value - the offset where U-Boot proper starts. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de>
2021-07-31arm: mvebu: Use U-Boot's SPL BootROM framework for booting from NAND/UARTPali Rohár1-23/+24
Current code uses hack in board_init_f() which calls return_to_bootrom() to skip U-Boot SPL code and return back to BootROM to load U-Boot via UART or from NAND. This change migrates that hack from the board_init_f() function and changes it to return BOOT_DEVICE_BOOTROM instead of returning to BootROM directly, so that U-Boot's SPL framework is used for returning to BootROM. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Chris Packham <judge.packham@gmail.com> Tested-by: Chris Packham <judge.packham@gmail.com>
2021-07-31arm: mvebu: Implement return_to_bootrom() via U-Boot's SPL frameworkPali Rohár2-0/+16
U-Boot's SPL framework already has an API for loading U-Boot via BootROM. Implement the function board_return_to_bootrom() for mvebu SPL code. Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Marek Behún <marek.behun@nic.cz> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Chris Packham <judge.packham@gmail.com> Tested-by: Chris Packham <judge.packham@gmail.com>
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