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2021-08-06pci: Drop DM_PCI check from bios_emulSimon Glass3-153/+0
We don't need these checks anymore since when PCI is enabled, driver model is always used. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06pci: scsi: pci: Drop DM_PCI check from scsiSimon Glass1-6/+0
We don't need this check anymore since when PCI is enabled, driver model is always used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06pci: imx: Drop use of DM_PCISimon Glass1-81/+0
Now that DM_PCI is always enabled we don't need to check it. Drop this old code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06pci: msc01: Drop use of DM_PCISimon Glass1-64/+0
Now that DM_PCI is always enabled we don't need to check it. Drop this old code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06pci: gt64120: Drop use of DM_PCISimon Glass1-64/+0
Now that DM_PCI is always enabled we don't need to check it. Drop this old code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06ppc: socrates: Drop use of DM_PCISimon Glass1-3/+1
Now that DM_PCI is always enabled we don't need to check it. Drop this old code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06ppc: malta: Drop use of DM_PCISimon Glass1-67/+0
Now that DM_PCI is always enabled we don't need to check it. Drop this old code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-06pci: usb: ohci: Test on PCI not DM_PCISimon Glass1-1/+1
Now that DM_PCI is always enabled, check on CONFIG_PCI instead. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Update for non-PCI users of this code, reword] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-05ppc: Drop DM_PCI from config filesSimon Glass10-204/+0
Now that DM_PCI is always enabled we don't need to check it. Drop this old code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-05pci: dm: core: Drop DM_PCI check from devfdt_get_addr_pci()Simon Glass1-2/+1
We don't need this check anymore since when PCI is enabled, driver model is always used. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-05pci: freescale: Drop old codeSimon Glass16-351/+0
Drop this old pre-driver model code. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-05pci: powerpc: Drop old codeSimon Glass3-352/+0
Drop the old pre-driver model code from these drivers. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-05ppc: Drop CONFIG_SYS_PCI_SUBSYS_VENDORIDSimon Glass6-6/+0
This is not used. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-05pci: Drop DM_PCI check from pci_commonSimon Glass1-2/+2
We don't need this check anymore since when PCI is enabled, driver model is always used. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-05pci: Remove guard around compatibility functionsSimon Glass1-2/+6
This prevents use of IS_ENABLED() in other files. Functions should be visible in headers even if they are not available at link time. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-05pci: Drop old code from pci commandSimon Glass1-212/+0
Drop the pre-driver model code from this file. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-05Merge branch '2021-08-04-assorted-minor-fixes'Tom Rini8-7/+83
- Assorted fixes
2021-08-04cmd:(cosmetic)Mentioned in 'chpart' command HELP text that it is for MTD devicesAdarsh Babu Kalepalli1-2/+2
Modified the help text of 'chpart' command ,mentioning that it is for MTD devices. Signed-off-by: Adarsh Babu Kalepalli <opensource.kab@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-04cmd:Elaborate 'blkcache' cmd HELP statementAdarsh Babu Kalepalli1-1/+2
HELP description is provided for ‘configure’ sub-command of ‘blkcache’. Signed-off-by: Adarsh Babu Kalepalli <opensource.kab@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-04config: MPC8548CDS: eliminate symbol CONFIG_SYS_ID_EEPROMHeinrich Schuchardt2-2/+0
Symbol CONFIG_SYS_ID_EEPROM is defined in include/configs/MPC8548CDS.h but never used. Remove it here and from the whitelist. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-08-04doc: Add basic information about running CI testsTom Rini2-0/+71
Start out by documenting general expectations on when CI is run, how anyone can run Azure pipelines, and how GitLab CI pipelines can be run. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-04fs/squashfs: Fix some hardlinks reading the wrong inodeCampbell Suter1-1/+1
In SquashFS, the contents of a directory is stored by squashfs_directory_entry structures which contain the file's name, inode and position within the filesystem. The inode number is not stored directly; instead each directory has one or more headers which set a base inode number, and files store the offset from that to the file's inode number. In mksquashfs, each inode is allocated a number in the same order as they are written to the directory table; thus the offset from the header's base inode number to the file's inode number is usually positive. Hardlinks are simply stored with two directory entries referencing the same file. This means the second entry will thus have an inode number much lower than the surrounding files. Since the header's base inode number comes from the first entry that uses the header, this delta will usually be negative. Previously, U-Boot's squashfs_directory_entry.inode_offset field was declared as an unsigned value. Thus when a negative value was found, it would either resolve to an invalid inode number or to that of an unrelated file. A squashfs image to test this can be created like so: echo hi > sqfs_test_files/001-root-file mkdir sqfs_test_files/002-subdir touch sqfs_test_files/002-subdir/003-file ln sqfs_test_files/{001-root-file,002-subdir/004-link} mksquashfs sqfs_test_files/ test.sqfs -noappend Note that squashfs sorts the files ASCIIbetacally, so we can use the names to control the order they appear in. The ordering is important - the first reference to the file must have a lower inode number than the directory in which the second reference resides, and the second reference cannot be the first file in the directory. Listing this sample image in U-Boot results in: => sqfsls virtio 2 002-subdir 0 003-file Inode not found. 0 004-link Signed-off-by: Campbell Suter <campbell@snapit.group> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
2021-08-04fit: Fix verification of images with external dataJohn Keeping1-1/+7
The "-E" option to mkimage generates a FIT with external data using the data-size and data-offset properties which must both be ignored when verifying a signature. Add "data-offset" to the list of excluded properties for signature verification; since the line is now too long, re-format the list to one-per-line and make it static since the data is constant. Signed-off-by: John Keeping <john@metanate.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-04CI: Update to LLVM-12Tom Rini3-7/+7
The current stable release of LLVM is 12, update to that. While at it, fix that we had not correctly upgraded to LLVM 11 previously. Signed-off-by: Tom Rini <trini@konsulko.com>
2021-08-03Merge https://source.denx.de/u-boot/custodians/u-boot-spiTom Rini3-10/+24
- SPI-NOR fix (Big Meng) - XMC XM25QH64C flash (Reto Schneider)
2021-08-03Merge https://source.denx.de/u-boot/custodians/u-boot-samsungTom Rini19-121/+83
2021-08-03mtd: spi-nor: Mask out fast read if not requested in DTBin Meng1-3/+13
The DT bindings of "jedec,spi-nor" [1] defines "m25p,fast-read" property to indicate that "fast read" opcode can be used to read data from the chip instead of the usual "read" opcode. If this property is not present in DT, mask out fast read in spi_nor_init_params(). This change mirrors the same logic in spi_nor_info_init_params() in drivers/mtd/spi-nor/core.c in the Linux kernel v5.14-rc3. [1] Documentation/devicetree/bindings/mtd/jedec,spi-nor.yaml in the kernel tree Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-08-03mtd: spi-nor: Respect flash's hwcaps in spi_nor_adjust_hwcaps()Bin Meng1-3/+4
The smart spi_nor_adjust_hwcaps() does not respect the SPI flash's hwcaps, and only looks to the controller on what can be supported. The flash's hwcaps needs to be AND'ed before checking. Fixes: 71025f013ccb ("mtd: spi-nor-core: Rework hwcaps selection") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-08-03spi: spi-mem-nodm: Fix read data size issueBin Meng1-4/+6
When slave drivers don't set the max_read_size, the spi-mem should directly use data.nbytes and not limit to any size. But current logic will limit to the max_write_size. This commit mirrors the same changes in the dm version done in commit 535b1fdb8e5e ("spi: spi-mem: Fix read data size issue"). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-08-03mtd: spi-nor-ids: Add support for XMC XM25QH64CReto Schneider1-0/+1
This chip has been (briefly) tested on the MediaTek MT7688 based GARDENA smart gateway. Datasheet: http://xmcwh.com/Uploads/2020-12-17/XM25QH64C_Ver1.1.pdf Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
2021-08-03Merge https://source.denx.de/u-boot/custodians/u-boot-x86Tom Rini37-135/+120
- Fixed broken ICH SPI driver in software sequencer mode - Added "m25p,fast-read" to SPI flash node for x86 boards - Drop ROM_NEEDS_BLOBS and BUILD_ROM for x86 ROM builds - Define a default TSC timer frequency for all x86 boards - x86 MTRR MSR programming codes bug fixes - x86 "hob" command bug fixes - Don't program MTRR for DRAM for FSP1 - Move INIT_PHASE_END_FIRMWARE to FSP2 - Use external graphics card by default on Intel Crown Bay - tangier: Fix DMA controller IRQ polarity in CSRT
2021-08-02Merge branch '2021-08-02-numeric-input-cleanups'Tom Rini254-948/+1169
- Merge in a series that cleans up and makes more consistent how we deal with numeric input on the CLI. This saves a few bytes in a lot of places.
2021-08-02lib: Allow using 0x when a decimal value is requestedSimon Glass4-17/+37
U-Boot mostly uses hex for value input, largely because addresses are much easier to understand in hex. But in some cases a decimal value is requested, such as where the value is small or hex does not make sense in the context. In these cases it is sometimes useful to be able to provide a hex value in any case, if only to resolve any ambiguity. Add this functionality, for increased flexibility. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02doc: Add a note about number representationSimon Glass1-0/+31
Mention the default base of U-Boot in the command-line section. Add examples for decimal and octal. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02doc: Convert command-line info to rSTSimon Glass3-41/+57
Take this part of the README and put it into rST format. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02lib: Move common digit-parsing code into a functionSimon Glass1-7/+24
The code to convert a character into a digit is repeated twice in this file. Factor it out into a separate function. This also makes the code a little easier to read. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02lib: Add octal tests for simple_strtoul/l()Simon Glass1-0/+10
This function support decoding octal but no tests are included yet. Add some. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02lib: Add tests for simple_strtoull()Simon Glass1-0/+61
Add some tests that check the behaviour of this function. These are the same as for simple_strtoul() but with a few longer values. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02lib: Drop unnecessary check for hex digitSimon Glass2-1/+3
If we see 0x then we can assume this is the start of a hex value. It does not seem necessary to check for a hex digit after that since it will happen when parsing the value anyway. Drop this check to simplify the code and reduce size. Add a few more test cases for when a 0x prefix is used. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02lib: Comment the base parameter with simple_strtoul/l()Simon Glass1-2/+8
This parameter is not documented properly since it does not cover the meaning when the base is 0. Update this in both functions. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02global: Convert simple_strtoul() with decimal to dectoul()Simon Glass111-230/+255
It is a pain to have to specify the value 10 in each call. Add a new dectoul() function and update the code to use it. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02global: Convert simple_strtoul() with hex to hextoul()Simon Glass183-659/+692
It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02hash: Ensure verification hex pairs are terminatedSimon Glass1-1/+1
This function seems to assume that the chr[] variable contains zeros at the start, which is not always true. Use strlcpy() to be safe. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-08-02x86: crownbay: Use external graphics card by defaultBin Meng1-2/+1
The board routes the Integrated Graphics Device (IGD) to an LVDS panel, which is less popular than a PCIe based graphics card. Disable the IGD so that it does not show up in the PCI configuration space as a VGA display controller, so we can use an external PCIe graphics card with whatever cable we have. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-02x86: queensbay: Return directly if IGD / SDVO were already disabledBin Meng1-11/+9
Initialize 'igd' and 'sdvo' to NULL so that we just need to test them against NULL later, to be compatible with that case that IGD and SDVO devices were already in disabled state. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2021-08-02x86: fsp: Only FSP2 has INIT_PHASE_END_FIRMWAREBin Meng2-16/+17
For FSP1, there is no such INIT_PHASE_END_FIRMWARE. Move board_final_cleanup() to fsp2 directory. Fixes: 7c73cea44290 ("x86: Notify the FSP of the 'end firmware' event") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested on chromebook_coral, chromebook_samus, chromebook_link, minnowmax Tested-by: Simon Glass <sjg@chromium.org>
2021-08-02x86: fsp: Don't program MTRR for DRAM for FSP1Bin Meng1-4/+23
There are several outstanding issues as to why this does not apply to FSP1: * For FSP1, the system memory and reserved memory used by FSP are already programmed in the MTRR by FSP. * The 'mtrr_top' mistakenly includes TSEG memory range that has the same RES_MEM_RESERVED resource type. Its address is programmed and reported by FSP to be near the top of 4 GiB space, which is not what we want for SDRAM. * The call to mtrr_add_request() is not guaranteed to have its size to be exactly the power of 2. This causes reserved bits of the IA32_MTRR_PHYSMASK register to be written which generates #GP. For FSP2, it seems this is necessary as without this, U-Boot boot process on Chromebook Coral goes very slowly. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested on chromebook_coral, chromebook_samus, chromebook_link, minnowmax Tested-by: Simon Glass <sjg@chromium.org>
2021-08-02Merge tag 'efi-2021-10-rc2' of ↵Tom Rini9-46/+54
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2021-10-rc2 Documentation: * handle 'make htmldocs' warnings as errors * add missing board/ti/index.rst Bug fixes: * avoid buffer overrun in TrueType console * lib: disable CONFIG_SPL_HEXDUMP by default
2021-08-02Merge tag 'mmc-2021-7-30' of https://source.denx.de/u-boot/custodians/u-boot-mmcTom Rini3-29/+38
pl180_mmci update and cleanup fix rpmb routing memory alignment
2021-08-02x86: cmd: hob: Fix display of resource type for system memoryBin Meng1-1/+1
The resource type for system memory is currently displayed as "unknown", which is wrong. Fixes: 51af144eb7a0 ("x86: Allow showing details about a HOB entry") Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested on chromebook_coral, chromebook_samus, chromebook_link, minnowmax Tested-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-14 06:49:05 +0300