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2020-09-28timer: mchp-pit64b: add support for pit64bClaudiu Beznea3-0/+117
Add support for Microchip PIT64B timer. The timer is 64 bit length and is used as a free running counter (in continuous mode with highest values for period registers). The clock feeding the timer would be no more than 12.5MHz. Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
2020-09-28riscv: restore global data pointer in trap handlerHeinrich Schuchardt1-0/+3
The gp register is used to store U-Boot's global data pointer. We should not assume that an UEFI application leaves the gp register unchanged as the UEFI specifications does not define who is the owner of the gp and tp registers. So the following sequence should be followed in the trap handler: * save the caller's gp register * restore the global data pointer * serve interrupts or print crash dump and reset * restore the caller's gp register Cc: Abner Chang <abner.chang@hpe.com> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Rick Chen <rick@andestech.com>
2020-09-28rng: meson: make core clock optionalNeil Armstrong1-1/+2
This fixes HWRNG support on Amlogic GXL, GXM, G12A, G12B & SM1 based boards dues to the lack of the core clock in the device tree. It was reported breaking EFI boot in the Linux EFI stub, because the EFI_RNG_PROTOCOL didn't check for the RNG device presence before installing itself. The Linux amlogic,meson-rng.yaml doesn't mandate the core clock, this the clock should be ignores if not present. Nevertheless, the clock should be present and this should be fixed on the Linux meson-gxl.dtsi & meson-g12-common.dtsi then synced with U-Boot. The change has been tested on a Khadas VIM3, which uses the common meson-g12-common.dtsi like the Odroid-C4 & Odroid-N2 in Scott's report, along with the RNG cmd. Cc: Heinrich Schuchardt <xypron.glpk@gmx.de> Reported-by: Scott K Logan <logans@cottsay.net> Fixes: bc40eb278b ("drivers/rng: add Amlogic hardware RNG driver") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Tested-by: Scott K Logan <logans@cottsay.net> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2020-09-27efi_loader: installation of EFI_RNG_PROTOCOLHeinrich Schuchardt4-6/+36
Having an EFI_RNG_PROTOCOL without a backing RNG device leads to failure to boot Linux 5.8. Only install the EFI_RNG_PROTOCOL if we have a RNG device. Reported-by: Scott K Logan <logans@cottsay.net> Cc: Neil Armstrong <narmstrong@baylibre.com> Cc: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-27efi_loader: efidebug display RNG protocolHeinrich Schuchardt1-0/+5
Add the Random Number Generator (RNG) protocol to the GUIDs that the 'efidebug dh' protocol can replace by a text. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2020-09-26board: renesas: ebisu: Drop CA57 check in reset_cpu()Lad Prabhakar1-14/+1
Renesas Ebisu board is based on R-Car E3 SoC which has dual CA53 and a CR7. This patch drops check for cputype from reset_cpu() and also drops the corresponding CA57 macros. While at it also dropped RST_RSTOUTCR macro which is unused. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
2020-09-26net: ravb: Remove writeext function callBiju Das1-2/+0
The micrel phy driver is already configuring this values from device tree. So remove the redundant phy configuration call from this driver. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26board: renesas: draak: Drop CA57 resetBiju Das1-14/+1
Renesas Draak board based on R-Car D3 has single CA53. This patch drops check for cputype from reset_cpu() and also drops the corresponding CA57 macros. While at it also dropped RST_RSTOUTCR macro which is unused. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26board: renesas: remove empty board_early_init_f functionBiju Das4-10/+2
Remove empty board_early_init_f function, since it is disabled in ebisu and condor board configs. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26arm: rmobile: Use imply for BOARD_EARLY_INIT_FBiju Das2-1/+2
Use "imply" instead of "select" for BOARD_EARLY_INIT_F config option, and then disable it on boards which don't need it. Updated grpeach_defconfig to disable CONFIG_BOARD_EARLY_INIT_F option for RZA1. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26board: renesas: Remove empty s_init functionBiju Das5-20/+0
Default s_init weak function available, so remove the s_init empty function. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26arm: mach-rmobile: Mark the default s_init function as weakBiju Das1-0/+6
Mark the default s_init function as weak, so that SoC's can override it if needed, and it will still be discarded if unused. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26arm: dts: r8a774e1: Import DTS from Linux 5.9-rc4Biju Das3-0/+1759
Import R8A774E1 (RZ/G2H) SoC DTSI and headers from upstream Linux kernel 5.9-rc4 commit f4d51dffc6c0 ("Linux 5.9-rc4") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26arm: dts: r8a774b1: Import DTS from Linux 5.9-rc4Biju Das3-0/+2713
Import R8A774B1 (RZ/G2N) SoC DTSI and headers from upstream Linux kernel 5.9-rc4 commit f4d51dffc6c0 ("Linux 5.9-rc4") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26arm: dts: r8a774a1: Import DTS from Linux 5.9-rc4Biju Das3-57/+51
Synchronize RZ/G2M SoC DTs with mainline Linux 5.9-rc4 commit f4d51dffc6c0 ("Linux 5.9-rc4") Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26pinctrl: renesas: Fix PINCTRL_PFC_R8A774A1 help descriptionBiju Das1-10/+10
R8A774A1 is part of Renesas RZ/G2 series and not R-Car, reflect the same for PINCTRL_PFC_R8A774A1 help description Alongside, sort the PINCTRL_PFC_R8A774A1 config option as per increasing number of the SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26arm: rmobile: Identify R8A7796 r1.3 SoCBiju Das1-2/+7
Add support to identify R8A7796 r1.3 SoC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
2020-09-26ARM: rmobile: Enable dfu tftp on Gen3Marek Vasut5-0/+48
Enable the fitImage update options on RCar Gen3 boards. This permits easy update of multiple bootloader components. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-09-26ARM: rmobile: Enable RPC on Salvator-X, ULCB, EbisuMarek Vasut14-0/+91
Enable the RPC Hyperflash driver on R8A7795,R8A7796,R8A77965 Salvator-X,ULCB and R8A77990 Ebisu. Note that to make the HF accessible, mainline ATF is mandatory and must be built with RCAR_RPC_HYPERFLASH_LOCKED=0 . Note that this is intended for development and testing convenience only and must be disabled in deployment for platform security reasons. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
2020-09-25Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini55-70/+247
- Bug fixes related to PCIe, pfe, xfi, gpio, reset, vid, env, and usb on layerscape products
2020-09-25Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 ↵Tom Rini153-224/+10787
into next - Enhance the 'zboot' command to be more like 'bootm' with sub-commands - The last series of ACPI core changes for programmatic generation of ACPI tables - Add all required ACPI tables for ApolloLake and enable ACPIGEN on Chromebook Coral - A feature minor enhancements to the 'hob' command - Intel edison: Support for writing an xFSTK image via binman
2020-09-25mmc: atmel-sdhci: use mmc_of_parse to get the DT propertiesEugen Hristev1-0/+4
Call mmc_of_parse at probe time to fetch all the host properties from the DT. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-09-25mmc: atmel-sdhci: enable the required generic clockEugen Hristev1-0/+4
The second clock of the IP block (the generic clock), must be explicitly enabled. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Peng Fan <pengfan@nxp.com>
2020-09-25mmc: atmel-sdhci: do not check clk_set_rate return valueEugen Hristev1-3/+1
clk_set_rate will return rate in case of success and zero in case of error, however it can also return -ev, but it's an ulong function. To avoid any issues, disregard the return value of this call. In case this call actually fails, nothing much we can do anyway, but we can at least try with the previous values (or DT assigned-clocks) Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-09-25mmc: atmel-sdhci: add sama7g5-sdhci compatibility stringEugen Hristev1-0/+1
Add new compatibility string for matching sama7g5 product. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-09-25pinctrl: at91-pio4: add compatible for sama7g5 pinctrl blockEugen Hristev1-0/+1
Add new compatible to microchip,sama7g5 new SoC. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-09-25ARM: mach-at91: add support for new SoC sama7g5Eugen Hristev6-0/+1016
Add support for new SoC sama7g5 Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
2020-09-25x86: edison: Add documentation for using am xFSTK imageSimon Glass1-0/+120
Add a description of how to flash Edison using the xFSTK tool. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-09-25x86: edison: Generate an image suitable for xFSTKSimon Glass4-0/+83
It is useful to be able to flash Edison directly without relying on the installed U-Boot being functional. Add a binman image for this. It includes a 'OSIP' header (which happens to look like an MBR / (Master-Boot Record), U-Boot binary and an environment. I am not able to find a specification for OSIP. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-09-25binman: Support adding a U-Boot environmentSimon Glass5-0/+132
In some cases it is useful to include a U-Boot environment region in an image. This allows the board to start up with an environment ready to go. Add a new entry type for this. The input is a text file containing the environment entries, one per line, in the format: var=value Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-09-25binman: Show an error when a file is missingSimon Glass3-2/+24
The recent support for missing external binaries does not show an error message when a file is genuinely missing (i.e. it is missing but not marked as 'external'). This means that when -m is passed to binman, it will never report a missing file. Fix this and add a test. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-09-25x86: Use multiple imagesSimon Glass3-21/+10
We already use binman's 'multiple-images' feature with Chrome OS and we want to use it for Edison. There is no real down-side. Adjust x86 to always use multiple-images. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
2020-09-25x86: video: Show information about each video deviceSimon Glass2-5/+33
At present the 'bdinfo' command shows the framebuffer address, but not the address of the copy framebuffer, if present. Add support for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25x86: Add support for more than 8 MTRRsSimon Glass3-12/+24
At present the mtrr command only support 8 MTRRs. Some SoCs have more than that. Update the implementation to support up to 10. Read the number of MTRRs dynamically instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25x86: Allow showing details about a HOB entrySimon Glass1-4/+45
Some HOBs include information that can be decoded. Add a -v option to the hob command, to allow this to be displayed. Add the ability to decode a resource descriptor. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25x86: hob: Try to show a name instead of a GUIDSimon Glass2-2/+66
GUIDs are one of the seven evils of the computer world. They obfuscate the meaning and require people to look up long hex strings to decode it. Luckily only a miniscule fraction of the 10^38 possible GUIDs are in use. Add a way to decode the GUIDs known to U-Boot. Add a few more to the list for good measure. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25x86: hob: Add way to show a single hob entrySimon Glass1-5/+11
The 'hob' command currently lists all HOB entries. Add way to list a single entry, by index. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25acpi: Use I2cSerialBusV2() instead of I2cSerialBus()Simon Glass2-2/+2
Use the correct name of the ACPI structure being created. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25acpi: Add more documentation for struct acpi_gpioSimon Glass1-0/+22
Add some documentation provided by Andy Shevchenko to describe how to use struct acpi_gpio. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25x86: coral: Update config and device tree for ACPISimon Glass2-16/+221
Enable new features and provide require device-tree config so that U-Boot produces the correct ACPI tables on Coral. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25x86: Move include of bitops out of ACPI regionSimon Glass1-1/+2
At present linux/bitops.h is included in ACPI code. This is not needed and can cause a problem in fls64.h since BITS_PER_LONG is not defined. Move the #include into the part not used by ACPI. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25x86: Add a way to add to the e820 memory tableSimon Glass2-0/+35
Some boards want to reserve extra regions of memory. Add a 'chosen' property to support this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25acpi: Use defines for field lengthsSimon Glass1-2/+3
A few fields have an open-coded length. Use the defines for this purpose instead. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25x86: fsp: Show FSP-S or FSP-M address in fsp_get_header()Simon Glass1-8/+14
At present this function only supports FSP-M but it is also used to read FSP-S, in which case FSP-M may be zero. Add support for showing whichever address is present in the FSP binary. Also change the debug() statements to log_debug() while here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25x86: fsp: Add more debugging for silicon initSimon Glass1-1/+3
If locating the FSP header hangs for whatever reason it is useful to see where it got stuck. Add a debug print. Also show the address of the FSP-S entry point as a sanity check. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25x86: apl: Check low-level init in FSP-S pre-initSimon Glass1-0/+2
If U-Boot is not running FSP-S it should not do the pre-init either. Add a condition to handle this. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25x86: coral: Add audio descriptor filesSimon Glass5-0/+0
Add files describing the various audio configurations supported on coral. These are passed to Linux in the ACPI tables. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25x86: acpi: Set the log category for x86 table generationSimon Glass1-0/+2
This file doesn't currently have a log category. Add one so that items are logged correctly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-09-25acpi: tpm: Add a TPM1 tableSimon Glass3-1/+61
This provides information about a v1 TPM in the system. Generate this table if the TPM is present. Add a required new bloblist type and correct the header order of one header file. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-09-25acpi: tpm: Add a TPM2 tableSimon Glass3-0/+86
This provides information about a v2 TPM in the system. Generate this table if the TPM is present. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.2.3 (git 2.39.0) at 2026-10-01 05:43:57 +0300