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2020-10-29sandbox: Allow selection of SPL unit testsSimon Glass3-1/+11
Now that we have more than one test, add a way to select the test to run. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29test: Run SPL unit testsSimon Glass1-1/+1
Update the 'run' script to include SPL unit tests. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29pytest: Collect SPL unit testsSimon Glass2-5/+42
Add a new test_spl fixture to handle running SPL unit tests. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29Makefile: Generate a symbol file for u-boot-splSimon Glass1-1/+6
Add a rule to generate u-boot-spl.sym so that pytest can discover the available unit tests. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: test: Add a very simple of-platadata testSimon Glass2-1/+22
At present we have a pytest that covers of-platadata. Add a very simple unit test that just checks that a device can be found. This shows the ability to write these tests in C. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: test: Add a way to run SPL testsSimon Glass5-1/+30
Add a -u flag for U-Boot SPL which requests that unit tests be run. To make this work, export dm_test_main() and update it to skip test features that are not used with of-platdata. To run the tests: $ spl/u-boot-spl -u U-Boot SPL 2020.10-rc5 (Oct 01 2020 - 07:35:39 -0600) Running 0 driver model tests Failures: 0 At present there are no SPL unit tests. Note that there is one wrinkle with these tests. SPL has limited memory available for allocation. Also malloc_simple does not free memory (free() is a nop) and running tests repeatedly causes driver-model to reinit multiple times and allocate memory. Therefore it is not possible to run more than a few tests at a time. One solution is to increase the amount of malloc space in sandbox_spl. This is not a problem for pytest, since it runs each test individually, so for now this is left as is. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: test: Update the test runner to support of-platdataSimon Glass1-11/+16
At present DM tests assume that a devicetree is available. This is not the case with of-platadata. Update the code to add this condition. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: test: Build tests for SPLSimon Glass3-1/+12
We want to run unit tests in SPL. Add a new Kconfig to control this and enable it for sandbox_spl Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: core: fix typo in device.hDario Binacchi1-1/+1
Replace 'a the' with 'the' in include/dm/device.h. Signed-off-by: Dario Binacchi <dariobin@libero.it> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-29sandbox: make SDL window resizableHeinrich Schuchardt1-1/+2
Without resizing the SDL window showed by ./u-boot -D -l is not legible on a high resolution screen. Allow resizing the window Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-29dtoc: Fix widening of int to bytesSimon Glass5-2/+24
At present an integer is converted to bytes incorrectly. The whole 32-bit integer is inserted as the first element of the byte array, and the other three bytes are skipped. This was not noticed because the unit test did not check it, and the functional test was checking for wrong values. Update the code to handle this as a special case. Add one more test to cover all code paths. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: core: Allow dm_warn() to be used in SPLSimon Glass4-5/+18
At present this option is disabled in SPL, meaning that warnings are not displayed. It is sometimes useful to see warnings in SPL for debugging purposes. Add a new Kconfig option to permit this. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dtoc: Order the structures internally by nameSimon Glass2-43/+83
At present the structures are written in name order, but parents have to be written before their children, so the file does not end up being in order. The order of nodes in _valid_nodes matches the order of the devicetree. Update the code so that _valid_nodes is in sorted order, by C name of the structure. This allows us to assign a sequential ordering to each U_BOOT_DEVICE() declaration. U-Boot's linker lists are also ordered alphabetically, which means that the order in the driver_info list will match the order used by dtoc. This defines an index ('idx') for the U_BOOT_DEVICE declarations. They appear in alphabetical order, numbered from 0 in _valid_nodes and in the driver_info linker list. Add a comment against each declaration, showing the idx value. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dtoc: Document the return value of scan_structs()Simon Glass1-0/+15
Add documentation to this function as well as generate_structs(), where the return value is ultimately passed in. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29sandbox: Drop ad-hoc device declarations in SPLSimon Glass3-0/+7
Since sandbox's SPL is build with of-platadata, we should not use U_BOOT_DEVICE() declarations as well. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: test: Disable some tests that should not run in SPLSimon Glass2-7/+13
Tests are easier to run in U-Boot proper. Running them in SPL does not add test coverage in most cases. Also some tests use features that are not available in SPL. Update the build rules to disable these tests in SPL. We still need test-main to be able to actually run SPL tests. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: test: Make use of CONFIG_UNIT_TESTSimon Glass2-2/+3
At present we always include test/dm from the main Makefile. We have a CONFIG_UNIT_TEST that should control whether the test/ directory is built, so rely on that instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: test: Update Makefile conditionsSimon Glass1-7/+7
At present most of the tests in test/Makefile are dependent on CONFIG_SANDBOX. But this is not ideal since they rely on commands being available and SPL does not support commands. Use CONFIG_COMMAND instead. This has the dual purpose of allowing these tests to be used on other boards and allowing SPL to skip them. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: test: Sort the MakefileSimon Glass1-3/+3
Move everything into alphabetical order. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: Avoid using #ifdef for CONFIG_OF_LIVESimon Glass6-49/+37
At present this option results in a number of #ifdefs due to the presence or absence of the global_data of_root member. Add a few macros to global_data.h to work around this. Update the code accordingly. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: core: Avoid void * in the of-platdata structsSimon Glass1-3/+5
These pointers point to drivers. Update the definition to make this clear. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dm: core: Expand the comment for DM_GET_DEVICE()Simon Glass1-1/+16
The current documentation for this is not particularly enlightening. Add a little more detail. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dtoc: Use a namedtuple for _linksSimon Glass1-4/+12
The use of strings to access a dict is a bit ugly. Use a namedtuple for this instead. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29dtoc: Extract inner loop from output_node()Simon Glass1-40/+49
This function is very long. Put the inner loop in a separate function to enhance readability. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29binman: Support multiple images in the librarySimon Glass1-0/+7
Add support for multiple images, since these are used on x86 now. Select the first image for now, since that is generally the correct one. At some point we can add a way to determine which image is currently running. Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29binman: Add a way to read the ROM offsetSimon Glass2-1/+13
Provide a function to read the ROM offset so that we can store the value in one place and clients don't need to store it themselves after calling binman_set_rom_offset(). Signed-off-by: Simon Glass <sjg@chromium.org>
2020-10-29Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvellTom Rini9-1254/+238
- Armada 8k: Add NAND support via PXA3xx NAND driver (Baruch) - Armada 8k: Use ATF serdes init instead of the "old" U-Boot version (Baruch) - Minor update to Octeon TX/TX2 defconfig (Stefan)
2020-10-29Merge tag 'xilinx-for-v2021.01-v2' of ↵Tom Rini74-561/+2987
https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze Xilinx changes for v2021.01-v2 common: - Add support for 64bit loadables from SPL xilinx: - Update documentation and record ownership - Enable eeprom board detection based legacy and fru formats - Add support for FRU format microblaze: - Optimize low level ASM code - Enable SPI/I2C - Enable distro boot zynq: - Add support for Zturn V5 zynqmp: - Improve silicon detection code - Enable several kconfig options - Align DT with the latest state - Enabling security commands - Enable and support FPGA loading from SPL - Optimize xilinx_pm_request() calling versal: - Some DTs/Kconfig/defconfig alignments - Add binding header for clock and power zynq-sdhci: - Add support for tap delay programming zynq-spi/zynq-qspi: - Use clock framework for getting clocks xilinx-spi: - Fix some code issues (unused variables) serial: - Check return value from clock functions in pl01x
2020-10-29configs: Resync with savedefconfigTom Rini144-404/+138
Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-29MAINTAINERS, git-mailrc: Update sunxi maintainersAndre Przywara2-3/+3
Maxime mentioned that he feels not having the time to be an Allwinner maintainer anymore. Take over from him. Maxime, many thanks for your great work in the past! I hope I can still relay the occasional technical question to you in the future. Acked-by: Maxime Ripard <mripard@kernel.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2020-10-29Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriqTom Rini141-116/+2396
- Bug fixes and updates on vid, ls1088a lx2160a and other layerscape platforms. - Add optee_rpmb support for LX2 & Kontron sl28 support
2020-10-29mtd: nand: pxa3xx: enable NAND controller if the SoC needs itShmuel Hazan2-10/+44
Based on Linux kernel commit fc256f5789cb ("mtd: nand: pxa3xx: enable NAND controller if the SoC needs it"). This commit adds support for the Armada 8040 nand controller. The kernel commit says this: Marvell recent SoCs like A7k/A8k do not boot with NAND flash controller activated by default. Enabling the controller is a matter of writing in a system controller register that may also be used for other NAND related choices. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29xilinx: Enable SPI driver for VersalMichal Simek1-0/+1
Enable Zynq SPI driver for Versal. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-29xilinx: Consolidate board_fit_config_name_match() for Xilinx platformsMichal Simek3-24/+11
Move board_fit_config_name_match() from Zynq/ZynqMP to common location. This change will open a way to use it also by Microblaze and Versal. Through this function there is a way to handle images with multiple DTBs. For now match it with DEVICE_TREE as is done for Zynq. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-10-29mmc: zynq_sdhci: Add common function to set input/output tapdelaysAshok Reddy Soma2-159/+36
Remove setting tapdelays for different speeds separately. Instead use the ITAP and OTAP delay values which are read from the device tree. If the DT does not contain tap delay values, the predefined values will be used for the same. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-10-29mmc: zynq_sdhci: Extend UHS timings till hs200Ashok Reddy Soma1-1/+1
Fix the condition to set UHS timings for speeds upto HS200. Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2020-10-29mtd: pxa3xx_nand: remove dead codeBaruch Siach1-9/+3
The kfree() call is unreachable, and is not needed. Remove this call and the fail_disable_clk label. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29mtd: pxa3xx_nand: port to use driver modelShmuel Hazan2-63/+54
Use the generic DT code to find the device compatible property for us. This makes the driver look more like other current drivers. It also make it easier to add support for other variants like Armada 8K in a future commit. Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29arm: dts: armada-cp110-master: update nand-controllerBaruch Siach1-6/+9
Align node properties to kernel dts node. The change of compatible property does not affect any currently supported board. Keep U-Boot specific nand-enable-arbiter, and num-cs for compatibility with the current driver. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29arm: dts: armada-cp110-slave: add missing cps_nandShmuel Hazan1-0/+16
Align node properties to kernel dts node. Keep U-Boot specific nand-enable-arbiter, and num-cs for compatibility with the current driver. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Shmuel Hazan <shmuel.h@siklu.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29arm: octeontx: Enable network support in supported boardsStefan Roese4-0/+8
Enable the now included network drivers in the currently supported Marvell Octeon TX & TX2 boards. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Aaron Williams <awilliams@marvell.com> Cc: Suneel Garapati <sgarapati@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com>
2020-10-29phy: marvell: cp110: update mode parameter for pcie power on callsIgal Liberman1-2/+5
It helps ATF to determine who called power on function (U-boot/Linux). The corresponding ATF code was added in this commit: mvebu: cp110: avoid pcie power on/off sequence when called from Linux https://github.com/ARM-software/arm-trusted-firmware/commit/55df84f974ea37abbb4f93f000f101f70cda5303 Signed-off-by: Igal Liberman <igall@marvell.com> Reviewed-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29phy: marvell: cp110: let the firmware configure comphy for PCIeGrzegorz Jaszczyk1-439/+12
Replace the comphy initialization for PCIe with appropriate SMC call, so the firmware will perform appropriate comphy initialization. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Signed-off-by: Ken Ma <make@marvell.com> Reviewed-by: Igal Liberman <igall@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-29phy: marvell: cp110: let the firmware configure the comphyGrzegorz Jaszczyk1-727/+89
Replace all comphy initialization with appropriate smc calls. It will result with triggering synchronous exception that is handled by Secure Monitor code in EL3. Then the Secure Monitor code will dispatch each smc call (by parsing the smc function identifier) and triggers appropriate comphy initialization. This patch reworks serdes handling for: SATA, SGMII, HS-SGMII and SFI interfaces. Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com> Reviewed-by: Igal Liberman <igall@marvell.com> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
2020-10-28Prepare v2021.01-rc1Tom Rini1-3/+3
Signed-off-by: Tom Rini <trini@konsulko.com>
2020-10-28Merge branch '2020-10-28-mux-driver-framework'Tom Rini21-1/+1461
- Add a framework for mux drivers
2020-10-28test: mux-cmd: Add tests for the 'mux' commandPratyush Yadav3-0/+179
Tests tests run the three mux subcommands: list, select, and deselect, and verify that the commands do what we expect. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-28cmd: Add a mux commandPratyush Yadav3-0/+191
This command lets the user list, select, and deselect mux controllers introduced with the mux framework on the fly. It has 3 subcommands: list, select, and deselect. List: Lists all the mux present on the system. The muxes are listed for each chip. The chip is identified by its device name. Each chip can have a number of mux controllers. Each is listed in sequence and is assigned a sequential ID based on its position in the mux chip. It lists details like ID, whether the mux is currently selected or not, the current state, the idle state, and the number of states. A sample output would look something like: => mux list a-mux-controller: ID Selected Current State Idle State Num States 0 no unknown as-is 0x4 1 no 0x2 0x2 0x10 2 no 0x73 0x73 0x100 another-mux-controller: ID Selected Current State Idle State Num States 0 no 0x1 0x1 0x4 1 no 0x2 0x2 0x4 Select: Selects a given mux and puts it in the specified state. This subcommand takes 3 arguments: mux chip, mux ID, state to set the mux in. The arguments mux chip and mux ID are used to identify which mux needs to be selected, and then it is selected to the given state. The mux needs to be deselected before it can be selected again in another state. The state should be a hexadecimal number. For example: => mux list a-mux-controller: ID Selected Current State Idle State Num States 0 no 0x1 0x1 0x4 1 no 0x1 0x1 0x4 => mux select a-mux-controller 0 0x3 => mux list a-mux-controller: ID Selected Current State Idle State Num States 0 yes 0x3 0x1 0x4 1 no 0x1 0x1 0x4 Deselect: Deselects a given mux and puts it in its idle state. This subcommand takes 2 arguments: the mux chip and mux ID to identify which mux needs to be deselected. So in the above example, we can deselect mux 0 using: => mux deselect a-mux-controller 0 => mux list a-mux-controller: ID Selected Current State Idle State Num States 0 no 0x1 0x1 0x4 1 no 0x1 0x1 0x4 Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-28test: Add tests for the multiplexer frameworkJean-Jacques Hiblot5-0/+280
Provide tests to check the behavior of the multiplexer framework. Two sets of tests are added. One is using an emulated multiplexer driver that can be used to test basic functionality like select, deselect, etc. The other is using the mmio mux which adds tests specific to it. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
2020-10-28Kconfig: Increase the pre-relocation memoryPratyush Yadav1-1/+1
The memory is close to full and adding a syscon node in test.dts makes it go over the limit and makes malloc() fail on startup. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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