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2023-01-06Merge branch 'CR_2708_VOUTCLK_yanhong.wang' into 'jh7110-master'andy.hu4-265/+490
2023-01-06Merge branch 'CR_2828_perf_support_minda' into 'jh7110-master'andy.hu1-0/+46
2023-01-05clk:starfive: Add vout clock driver for StarFive JH7110Yanhong Wang4-265/+490
2023-01-05dts: add i2c5 and attach pmic configurationminda.chen2-0/+20
2023-01-03dts: pmu : add riscv pmu dts configminda.chen1-0/+46
2023-01-03misc: OTP: Starfive-jh7110: update the return value of starfive_otp_readYanhong Wang3-5/+14
2022-12-19Merge branch 'CR_2876_SET_CPU_FREQ_samin.guo' into 'jh7110-master'andy.hu2-3/+3
2022-12-16board:starfive:jh7110: Set the CPU default frequency to 1000MHzSamin Guo1-2/+2
2022-12-14board:starfive:jh7110: default cpufreq is 1000Mhz.Samin Guo1-1/+1
2022-11-25Merge branch 'CR_2709_pinctrl_jianlong' into 'jh7110-master'andy.hu13-28/+1518
2022-11-23board:starfive:Remove usb/sdio0/sdio1 gpio initJianlong Huang1-21/+0
2022-11-23dts:starfive:Add pinctrl configJianlong Huang2-7/+59
2022-11-21configs: Enable STARFIVE_PINCTRLJianlong Huang1-0/+4
2022-11-21pinctrl: starfive: Add StarFive JH7110 driverKuan Lim Lee8-0/+1028
2022-11-21dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitionsJianlong Huang1-0/+427
2022-11-09Merge branch 'CR_2555_CMA_samin.guo' into 'jh7110-master'andy.hu1-4/+4
2022-11-09borad:jh7110:evb: Modify ramdisk_addr_r/pxefile_addr_r/scriptaddrSamin Guo1-4/+4
2022-11-02Merge branch 'CR_2522_ECO_EVB_samin.guo' into 'jh7110-master'andy.hu7-187/+387
2022-11-02driver:qspi: Switch the QSPI parent clock to pll0Samin Guo2-2/+5
2022-11-01spl:starfive:jh7110: Improved GMAC0/1 TX I/O PAD capabilitySamin Guo1-15/+30
2022-11-01board:starfive:evb: Support using env to detect board versionSamin Guo2-0/+22
2022-11-01board:starfive:evb: add get_chip_typeSamin Guo2-1/+29
2022-11-01board:starfive:evb: add jh7110_gmac_sel_tx_to_rgmiiSamin Guo2-0/+26
2022-11-01dts:starfive:jh7110: set gmac phy tx_inverted for JH7110A/B.Samin Guo1-1/+11
2022-11-01net:phy:motorcomm: Support modifying RGMII_TX_CLK delay train from dtsSamin Guo1-173/+269
2022-10-18ram: starfive: Make DDR driver support 8G sizeYan Hong Wang4-733/+547
2022-10-18riscv: dts: jh7110: Add reset property to DDR control nodeYan Hong Wang1-1/+5
2022-10-18ram: starfive: jh7110: Replace the configuration operation for pll1 clkYan Hong Wang2-27/+6
2022-10-18clk: starfive: jh7110: Modify the parameters of clk_register()Yan Hong Wang1-34/+11
2022-10-18spl: starfive: jh7110: switch pll2 to 1188MYan Hong Wang1-165/+11
2022-10-18arch: riscv: jh7110: add pll clk configuration for jh7110Yan Hong Wang4-18/+416
2022-10-18configs: starfive: fix tftpboot file waite a long time for the first timeJianlong Huang2-2/+3
2022-10-18clk:jh7110: update apb_bus clk relationshipyanhong.wang2-51/+33
2022-10-18configs: starfive_evb_defconfig: Support saveenvJianlong Huang2-3/+5
2022-10-18spl:jh7110: Modify cpu frequency should be before switching pllsamin1-3/+3
2022-10-18config:starfive-jh7110: add sd card boot configClivia.Cai1-1/+2
2022-10-18riscv:dts:starfive-jh7110: modify Model and riscv,isa infoyanhong.wang2-6/+6
2022-10-18ram:starfive: Make ddr driver support 2G sizeyanhong.wang4-25/+250
2022-10-18reset:starfive:jh7110: Delete redundant logicyanhong.wang1-28/+1
2022-10-18clk:jh7110: pll0 dynamically gets the frequencysamin1-5/+35
2022-10-18spl:starfive: Add support for different CPU frequencies.samin1-0/+157
2022-10-18spl:starfive: remove function spl_cpu_fre_150/125samin1-33/+0
2022-10-18board:starfive:evb: update uart3-uart5 resetsyanhong.wang2-6/+13
2022-10-18SPL:reset:starfive-jh7110: support reset in SPLyanhong.wang2-1/+9
2022-10-18clk:riscv:starfive: update uart3-uart5 clksyanhong.wang1-16/+24
2022-10-18serial: ns16550: support a list of clkyanhong.wang1-0/+12
2022-10-18SPL:starfive-jh7110: Modify the default division factor of sdcard clkyanhong.wang2-0/+9
2022-10-18board:starfive:evb: add usb init configyanhong.wang3-24/+84
2022-10-18clk:starfive-jh7110: Update pll0/pll1/pll2 clkyanhong.wang2-24/+4
2022-10-18net:phy:YUTAI: change tx delay configyanhong.wang1-1/+1
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