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2023-08-16riscv: starfive: jh7110: Add JH7110_XX_BOOTENSamin Guo1-0/+111
Add JH7110_DISTRO_BOOTEN/JH7110_SDK_BOOTEN for debian/sdk boot on JH7110 SOC. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-08-16riscv: starfive: evb: remove unused bootenvSamin Guo1-17/+0
will be replaced by the new bootenv Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-28Merge branch 'CR_6806_MMC_evb_william.qiu' into 'jh7110-master'andy.hu2-0/+13
CR_6806: spl: starfive: modify driver strength and slew rate See merge request sdk/u-boot!63
2023-07-28riscv: dts: starfive: limit cclk_in frequencyWilliam Qiu1-0/+2
The frequency of cclk_in is limited to 50M, so that it does not do internal part frequency and goes by-pass mode. And delete syscon node. Signed-off-by: William Qiu <william.qiu@starfivetech.com>
2023-07-28spl: starfive: modify driver strength and slew rateWilliam Qiu1-0/+11
Set eMMC/sd clk's DR to 2 and set its SR to 1. Signed-off-by: William Qiu <william.qiu@starfivetech.com>
2023-07-26Merge branch 'CR_6570_SDBOOT_u-boot_william.qiu' into 'jh7110-master'andy.hu4-2/+113
CR_6570: mmc: starfive: add HS200 support See merge request sdk/u-boot!62
2023-07-26defconfig: starfive: enable HS200 supportWilliam Qiu1-0/+2
enable HS200 support. Signed-off-by: William Qiu <william.qiu@starfivetech.com>
2023-07-26gpio: starfive: Add SET_DS/SET_PULL/SET_SLEW supportSamin Guo1-1/+23
SET_DS/SET_PULL/SET_SLEW can configure the properties of the GPIO Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-26Merge branch 'CR_6728_multi_pcis_minda' into 'jh7110-master'andy.hu1-8/+8
CR_6728 pci: Get te correct config addr to support multi PCI See merge request sdk/u-boot!61
2023-07-26mmc: starfive: fix mmc device power-up sequenceWilliam Qiu2-0/+27
fix mmc device power-up sequence. Signed-off-by: William Qiu <william.qiu@starfivetech.com>
2023-07-26mmc: starfive: add HS200 supportWilliam Qiu2-1/+61
Add tuning and other related code to the driver to support HS200 mode. Signed-off-by: William Qiu <william.qiu@starfivetech.com>
2023-07-26pci: Getw correct config addr to support multi PCIMinda Chen1-8/+8
subtract the root bus number to get the correct config addr. Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
2023-07-20Merge branch 'CR6648_dram_init_smain.guo' into 'jh7110-master'andy.hu3-3/+7
CR_6648: board: starfive: evb: use dram_init in spl See merge request sdk/u-boot!60
2023-07-20board: starfive: evb: use dram_init in splSamin Guo3-3/+7
dram_init call fdtdec_setup_mem_size_base, so starfive_ddr.c do not need it. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-20Merge branch 'CR_6604_1G_DDR_SYNC_samin.guo' into 'jh7110-master'andy.hu9-108/+2809
CR6604：dram: jh7110: sync from devkits/vf2 See merge request sdk/u-boot!59
2023-07-19Merge branch 'CR_6572_evb_uboot_hdmi_blank_panel_keith.zhao' into ↵andy.hu5-12/+176
'jh7110-master' CR 6572 uboot: hdmi logo causes kernel hdmi unstable See merge request sdk/u-boot!58
2023-07-19board: starfive: evb: Add dynamic CMA adjustment schemeSamin Guo2-0/+46
Synchronize from vf2 to the dynamic CMA scheme Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-19dram: starfive: jh7110: Add ddr4 supportSamin Guo6-68/+2706
Add ddr4 tuning support (sync from devkits) Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-19board: starfive: evb: Add resize-ddr functionSamin Guo1-0/+47
Add board-level resize-DDR function for evb Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-18riscv: dts: starfive: jh7110: replace mipi&hdmi nodeKeith Zhao1-4/+4
replace mipi&hdmi node , hdmi logo will start begin mipi Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
2023-07-18uboot: hdmi logo causes kernel hdmi unstableKeith Zhao4-8/+172
The hdmi display is unstable after repeated reset blank panel or write panel Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
2023-07-18dram: jh7110: remove resize-ddr functionSamin Guo1-40/+10
The resize-ddr should be board-level code Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-12Merge branch 'CR_5623_1GDDR_samin.guo' into 'jh7110-master'andy.hu7-52/+118
CR5623： Add 1G DDR support && Simplify the command of uboot to load Linux See merge request sdk/u-boot!57
2023-07-10borad: starfive: evb: Synchronize environment variables from vf2Samin Guo1-0/+4
loadaddr fdtoverlay_addr_r kernel_comp_addr_r/kernel_comp_size Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10borad: starfive: evb: Resize the address spaceSamin Guo1-20/+8
Readjust the address space for 1G DDR Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10riscv: jh7110: add spi nor flash SPI_FLASH_MACRONIX supportSamin Guo1-0/+1
Radxa uses macronix spi flash, so enable it. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10riscv: jh7110: set SPL_OPENSBI_LOAD_ADDRSamin Guo1-0/+1
set SPL_OPENSBI_LOAD_ADDR to 0x40000000 Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10dram: starfive: jh7110: Add 1G supportSamin Guo5-29/+47
add 1G DDR tuning cfg Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10dram: jh7110: Add CONFIG_ID_EEPROM to determine if EEPROM is availableSamin Guo1-18/+26
When eeprom reads, you need to determine whether eeprom supports it. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10dram: jh7110: Macro definitions STARFIVE_JH7110_EEPROM_DDRINFO_OFFSETSamin Guo1-1/+2
In order to read DDR info from eeprom. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-06-25dram: jh7110: Add resize DDR info from EEPROM.Samin Guo1-2/+47
sync from vf2 and add resize DDR info from EEPROM Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-06-20Merge branch 'CR_6164_evb_uboot_mem_keith.zhao' into 'jh7110-master'andy.hu1-1/+1
CR 6164 riscv: config: starfive: jh7110: mem size See merge request sdk/u-boot!56
2023-06-20riscv: config: starfive: jh7110: mem sizeKeith Zhao1-1/+1
reduce the mem size from 800+M to 128M Signed-off-by: Keith Zhao <keith.zhao@starfivetech.com>
2023-06-07Merge branch 'CR_5469_CPU_Max_Speed_mason.huo' into 'jh7110-master'andy.hu2-41/+33
CR_5469 board: starfive: jh7110: Add support for 1.25GHz chips See merge request sdk/u-boot!55
2023-06-05board: starfive: jh7110: Add support for 1.25GHz chipsMason Huo2-41/+33
Remove max cpu voltages: 1.12v, 1.10v, 1.08v. Set the cpu max frequency to 1.25G per OTP value. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
2023-05-19Merge branch 'CR_3508_update_toolchain' into 'jh7110-master'andy.hu1-6/+6
CR_3508: riscv: dts: starfive: add zicsr_zifencei to riscv,isa string See merge request sdk/u-boot!54
2023-05-18riscv: dts: starfive: add zicsr_zifencei to riscv,isa stringAndy Hu1-6/+6
Starting from gcc 12.x, csr and fence instructions have been separated from the base I instruction set. special the zicsr_zifencei string to DT riscv,isa string Signed-off-by: Andy Hu <andy.hu@starfivetech.com>
2023-05-10Merge branch 'CR_5042_gmac_phy_delay_ds_samin.guo' into 'jh7110-master'andy.hu1-2/+20
CR5042： net: phy: motorcomm: add Pad Drive Strength Cfg See merge request sdk/u-boot!52
2023-05-10Merge branch 'CR_4854_nvboot_shanlong.li' into 'jh7110-master'andy.hu2-1/+17
CR_4854: uboot: evb support boot from nvme ssd See merge request sdk/u-boot!53
2023-05-05uboot: evb support boot from nvme ssdshanlong.li2-1/+17
support boot from nvme ssd Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
2023-04-26Merge branch 'CR_5041_Copyright_yanhong.wang' into 'jh7110-master'andy.hu29-30/+31
CR 5041 board: starfive: copyright: Standardize the copyright format See merge request sdk/u-boot!51
2023-04-23board: starfive: copyright: Standardize the copyright formatYanhong Wang29-30/+31
Unify the content format of the copyright section Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
2023-04-20net: phy: motorcomm: add Pad Drive Strength CfgSamin Guo1-2/+20
YT8531 supports Pad Drive Strength configuration. Including rx_data/rx_clk, etc. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-04-19Merge branch 'CR_4747_remove_cycles_pmu_dts_minda' into 'jh7110-master'andy.hu1-5/+2
CR_4747 dts: pmu: remove pmu dts stall cycles config. See merge request sdk/u-boot!50
2023-04-12Merge branch 'CR_4427_DEFCONFIG_yanhong.wang' into 'jh7110-master'andy.hu1-1/+2
CR 4427 configs: starfive:　Enable CONFIG_OF_SEPARATE configuration See merge request sdk/u-boot!47
2023-04-10dts: pmu: remove pmu dts stall cycles config.Minda Chen1-5/+2
class 8 and class9 cpu stall cycles hwcounter is not supported in U74. delete the configuration. Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
2023-04-07Merge branch 'CR_4563_memcpy_samin.guo' into 'jh7110-master'andy.hu3-22/+103
CR4563：Configure the l2 prefetcher parameter See merge request sdk/u-boot!48
2023-04-07Merge branch 'CR_3910_Modify_cpu_vol_mason.huo' into 'jh7110-master'andy.hu2-18/+30
CR_3910 Modify cpu voltage set commands See merge request sdk/u-boot!49
2023-04-07board: starfive: jh7110: Modify cpu voltage set commandsMason Huo2-18/+30
Update the cpu voltage set commands per binning information from OTP. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
2023-04-04riscv: dts: jh7110: Add L2 pretcher configurationSamin Guo1-0/+10
Add L2 pretcher configuration for starfive jh7110 SoC. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-03-15 09:01:17 +0300