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-rw-r--r--drivers/mtd/at45.c26
-rw-r--r--drivers/mtd/cfi_flash.c2
-rw-r--r--drivers/mtd/nand/Makefile6
-rw-r--r--drivers/mtd/nand/diskonchip.c10
-rw-r--r--drivers/mtd/nand/nand_base.c20
-rw-r--r--drivers/mtd/nand/nand_bbt.c8
-rw-r--r--drivers/mtd/nand/nand_ids.c118
-rw-r--r--drivers/mtd/nand/nand_util.c7
-rw-r--r--drivers/mtd/nand_legacy/Makefile8
-rw-r--r--drivers/mtd/nand_legacy/nand_legacy.c30
-rw-r--r--drivers/mtd/spi/Makefile47
-rw-r--r--drivers/mtd/spi/atmel.c362
-rw-r--r--drivers/mtd/spi/spi_flash.c162
-rw-r--r--drivers/mtd/spi/spi_flash_internal.h45
14 files changed, 738 insertions, 113 deletions
diff --git a/drivers/mtd/at45.c b/drivers/mtd/at45.c
index dac987a43a..a9d13ff90e 100644
--- a/drivers/mtd/at45.c
+++ b/drivers/mtd/at45.c
@@ -140,8 +140,8 @@ AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc
}
/*--------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashContinuousRead */
-/* Object : Continuous stream Read */
+/* Function Name : AT91F_DataFlashContinuousRead */
+/* Object : Continuous stream Read */
/* Input Parameters : DataFlash Service */
/* : <src> = dataflash address */
/* : <*dataBuffer> = data buffer pointer */
@@ -205,7 +205,7 @@ AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(AT91PS_DataFlash pDataFlash,
/* Object : Read a page in the SRAM Buffer 1 or 2 */
/* Input Parameters : DataFlash Service */
/* : Page concerned */
-/* : */
+/* : */
/* Return value : State of the dataflash */
/*---------------------------------------------------------------------------*/
AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(
@@ -303,10 +303,10 @@ AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer(
/*---------------------------------------------------------------------------*/
/* Function Name : AT91F_PageErase */
-/* Object : Erase a page */
+/* Object : Erase a page */
/* Input Parameters : DataFlash Service */
/* : Page concerned */
-/* : */
+/* : */
/* Return value : State of the dataflash */
/*---------------------------------------------------------------------------*/
AT91S_DataFlashStatus AT91F_PageErase(
@@ -328,10 +328,10 @@ AT91S_DataFlashStatus AT91F_PageErase(
/*---------------------------------------------------------------------------*/
/* Function Name : AT91F_BlockErase */
-/* Object : Erase a Block */
+/* Object : Erase a Block */
/* Input Parameters : DataFlash Service */
/* : Page concerned */
-/* : */
+/* : */
/* Return value : State of the dataflash */
/*---------------------------------------------------------------------------*/
AT91S_DataFlashStatus AT91F_BlockErase(
@@ -510,10 +510,10 @@ AT91S_DataFlashStatus AT91F_DataFlashWrite(AT91PS_DataFlash pDataFlash,
}
/*---------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashRead */
+/* Function Name : AT91F_DataFlashRead */
/* Object : Read a block in dataflash */
-/* Input Parameters : */
-/* Return value : */
+/* Input Parameters : */
+/* Return value : */
/*---------------------------------------------------------------------------*/
int AT91F_DataFlashRead(AT91PS_DataFlash pDataFlash,
unsigned long addr, unsigned long size, char *buffer)
@@ -548,9 +548,9 @@ int AT91F_DataFlashRead(AT91PS_DataFlash pDataFlash,
}
/*---------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataflashProbe */
-/* Object : */
-/* Input Parameters : */
+/* Function Name : AT91F_DataflashProbe */
+/* Object : */
+/* Input Parameters : */
/* Return value : Dataflash status register */
/*---------------------------------------------------------------------------*/
int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc)
diff --git a/drivers/mtd/cfi_flash.c b/drivers/mtd/cfi_flash.c
index 68ab55f8a5..d84f0fc55e 100644
--- a/drivers/mtd/cfi_flash.c
+++ b/drivers/mtd/cfi_flash.c
@@ -1720,6 +1720,8 @@ ulong flash_get_size (ulong base, int banknum)
int erase_region_count;
struct cfi_qry qry;
+ memset(&qry, 0, sizeof(qry));
+
info->ext_addr = 0;
info->cfi_version = 0;
#ifdef CFG_FLASH_PROTECTION
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 244fa09b20..7bd22a0c9d 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -23,7 +23,7 @@
include $(TOPDIR)/config.mk
-LIB := $(obj)libnand.a
+LIB := $(obj)libnand.a
COBJS-y += nand.o
COBJS-y += nand_base.o
@@ -35,8 +35,8 @@ COBJS-y += nand_util.o
COBJS-y += fsl_upm.o
COBJS := $(COBJS-y)
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
all: $(LIB)
diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c
index e17af70d07..fdd85c159d 100644
--- a/drivers/mtd/nand/diskonchip.c
+++ b/drivers/mtd/nand/diskonchip.c
@@ -187,7 +187,7 @@ static int doc_ecc_decode (struct rs_control *rs, uint8_t *data, uint8_t *ecc)
/* Calc s[i] = s[i] / alpha^(v + i) */
for (i = 0; i < NROOTS; i++) {
if (syn[i])
- syn[i] = rs_modnn(rs, rs->index_of[s[i]] + (NN - FCR - i));
+ syn[i] = rs_modnn(rs, rs->index_of[s[i]] + (NN - FCR - i));
}
/* Call the decoder library */
nerr = decode_rs16(rs, NULL, NULL, 1019, syn, 0, errpos, 0, errval);
@@ -357,7 +357,7 @@ static void doc2000_readbuf(struct mtd_info *mtd,
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
void __iomem *docptr = doc->virtadr;
- int i;
+ int i;
if (debug)printk("readbuf of %d bytes: ", len);
@@ -372,7 +372,7 @@ static void doc2000_readbuf_dword(struct mtd_info *mtd,
struct nand_chip *this = mtd->priv;
struct doc_priv *doc = this->priv;
void __iomem *docptr = doc->virtadr;
- int i;
+ int i;
if (debug) printk("readbuf_dword of %d bytes: ", len);
@@ -1710,7 +1710,7 @@ fail:
static void release_nanddoc(void)
{
- struct mtd_info *mtd, *nextmtd;
+ struct mtd_info *mtd, *nextmtd;
struct nand_chip *nand;
struct doc_priv *doc;
@@ -1739,7 +1739,7 @@ static int __init init_nanddoc(void)
* generator polinomial degree = 4
*/
rs_decoder = init_rs(10, 0x409, FCR, 1, NROOTS);
- if (!rs_decoder) {
+ if (!rs_decoder) {
printk (KERN_ERR "DiskOnChip: Could not create a RS decoder\n");
return -ENOMEM;
}
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 2da1d4621c..5aef31cd18 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -10,7 +10,7 @@
* http://www.linux-mtd.infradead.org/tech/nand.html
*
* Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
- * 2002 Thomas Gleixner (tglx@linutronix.de)
+ * 2002 Thomas Gleixner (tglx@linutronix.de)
*
* 02-08-2004 tglx: support for strange chips, which cannot auto increment
* pages on read / read_oob
@@ -838,7 +838,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
unsigned long timeo;
if (state == FL_ERASING)
- timeo = (CFG_HZ * 400) / 1000;
+ timeo = (CFG_HZ * 400) / 1000;
else
timeo = (CFG_HZ * 20) / 1000;
@@ -876,7 +876,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
* nand_write_page - [GENERIC] write one page
* @mtd: MTD device structure
* @this: NAND chip structure
- * @page: startpage inside the chip, must be called with (page & this->pagemask)
+ * @page: startpage inside the chip, must be called with (page & this->pagemask)
* @oob_buf: out of band data buffer
* @oobsel: out of band selecttion structre
* @cached: 1 = enable cached programming if supported by chip
@@ -890,10 +890,10 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page,
u_char *oob_buf, struct nand_oobinfo *oobsel, int cached)
{
- int i, status;
+ int i, status;
u_char ecc_code[32];
int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
- uint *oob_config = oobsel->eccpos;
+ uint *oob_config = oobsel->eccpos;
int datidx = 0, eccidx = 0, eccsteps = this->eccsteps;
int eccbytes = 0;
@@ -970,7 +970,7 @@ static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int pa
* nand_verify_pages - [GENERIC] verify the chip contents after a write
* @mtd: MTD device structure
* @this: NAND chip structure
- * @page: startpage inside the chip, must be called with (page & this->pagemask)
+ * @page: startpage inside the chip, must be called with (page & this->pagemask)
* @numpages: number of pages to verify
* @oob_buf: out of band data buffer
* @oobsel: out of band selecttion structre
@@ -988,10 +988,10 @@ static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int pa
static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode)
{
- int i, j, datidx = 0, oobofs = 0, res = -EIO;
+ int i, j, datidx = 0, oobofs = 0, res = -EIO;
int eccsteps = this->eccsteps;
int hweccbytes;
- u_char oobdata[64];
+ u_char oobdata[64];
hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0;
@@ -1035,7 +1035,7 @@ static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int
int idx = oobsel->eccpos[i];
if (oobdata[idx] != oob_buf[oobofs + idx] ) {
DEBUG (MTD_DEBUG_LEVEL0,
- "%s: Failed ECC write "
+ "%s: Failed ECC write "
"verify, page 0x%08x, " "%6i bytes were succesful\n", __FUNCTION__, page, i);
goto out;
}
@@ -1739,7 +1739,7 @@ static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
/* Verify the remaining pages */
cmp:
this->data_poi = bufstart;
- ret = nand_verify_pages (mtd, this, startpage, totalpages,
+ ret = nand_verify_pages (mtd, this, startpage, totalpages,
oobbuf, oobsel, chipnr, (eccbuf != NULL));
if (!ret)
*retlen = written;
diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c
index 19a9bc2a5b..eff76d717c 100644
--- a/drivers/mtd/nand/nand_bbt.c
+++ b/drivers/mtd/nand/nand_bbt.c
@@ -34,9 +34,9 @@
* number which indicates which of both tables is more up to date.
*
* The table uses 2 bits per block
- * 11b: block is good
- * 00b: block is factory marked bad
- * 01b, 10b: block is marked bad due to wear
+ * 11b: block is good
+ * 00b: block is factory marked bad
+ * 01b, 10b: block is marked bad due to wear
*
* The memory bad block table uses the following scheme:
* 00b: block is good
@@ -739,7 +739,7 @@ static void mark_bbt_region (struct mtd_info *mtd, struct nand_bbt_descr *td)
for (i = 0; i < chips; i++) {
if ((td->options & NAND_BBT_ABSPAGE) ||
!(td->options & NAND_BBT_WRITE)) {
- if (td->pages[i] == -1) continue;
+ if (td->pages[i] == -1) continue;
block = td->pages[i] >> (this->bbt_erase_shift - this->page_shift);
block <<= 1;
oldval = this->bbt[(block >> 3)];
diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c
index 524b6b19a7..7363490395 100644
--- a/drivers/mtd/nand/nand_ids.c
+++ b/drivers/mtd/nand/nand_ids.c
@@ -23,82 +23,82 @@
* Name. ID code, pagesize, chipsize in MegaByte, eraseblock size,
* options
*
-* Pagesize; 0, 256, 512
-* 0 get this information from the extended chip ID
+* Pagesize; 0, 256, 512
+* 0 get this information from the extended chip ID
+ 256 256 Byte page size
* 512 512 Byte page size
*/
struct nand_flash_dev nand_flash_ids[] = {
- {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
- {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
- {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
- {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
- {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
- {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
- {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
- {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
- {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
- {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
-
- {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
- {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
- {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
- {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
-
- {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
- {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
- {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
- {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
-
- {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
- {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
- {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
- {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
-
- {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
- {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
- {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
- {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
-
- {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
- {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
- {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
- {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
-
- {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
+ {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
+ {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
+ {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
+ {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
+ {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
+ {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
+ {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
+ {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
+ {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
+ {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
+
+ {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
+ {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
+ {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16},
+ {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16},
+
+ {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
+ {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
+ {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16},
+ {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16},
+
+ {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
+ {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
+ {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16},
+ {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16},
+
+ {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
+ {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
+ {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16},
+ {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16},
+
+ {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
+ {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
+ {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16},
+ {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16},
+
+ {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
/* These are the new chips with large page size. The pagesize
* and the erasesize is determined from the extended id bytes
*/
/* 1 Gigabit */
- {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
- {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
- {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
- {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
/* 2 Gigabit */
- {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
- {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
- {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
- {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
/* 4 Gigabit */
- {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
- {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
- {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
- {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
/* 8 Gigabit */
- {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
- {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
- {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
- {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
/* 16 Gigabit */
- {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
- {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
- {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
- {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_NO_AUTOINCR},
+ {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
+ {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, NAND_SAMSUNG_LP_OPTIONS | NAND_BUSWIDTH_16 | NAND_NO_AUTOINCR},
/* Renesas AND 1 Gigabit. Those chips do not support extended id and have a strange page/block layout !
* The chosen minimum erasesize is 4 * 2 * 2048 = 16384 Byte, as those chips have an array of 4 page planes
diff --git a/drivers/mtd/nand/nand_util.c b/drivers/mtd/nand/nand_util.c
index 6c5624a49a..c82f77b555 100644
--- a/drivers/mtd/nand/nand_util.c
+++ b/drivers/mtd/nand/nand_util.c
@@ -153,6 +153,13 @@ int nand_erase_opts(nand_info_t *meminfo, const nand_erase_options_t *opts)
priv_nand->bbt = NULL;
}
+ if (erase_length < meminfo->erasesize) {
+ printf("Warning: Erase size 0x%08x smaller than one " \
+ "erase block 0x%08x\n",erase_length, meminfo->erasesize);
+ printf(" Erasing 0x%08x instead\n", meminfo->erasesize);
+ erase_length = meminfo->erasesize;
+ }
+
for (;
erase.addr < opts->offset + erase_length;
erase.addr += meminfo->erasesize) {
diff --git a/drivers/mtd/nand_legacy/Makefile b/drivers/mtd/nand_legacy/Makefile
index 95314d80ba..4e29c36e70 100644
--- a/drivers/mtd/nand_legacy/Makefile
+++ b/drivers/mtd/nand_legacy/Makefile
@@ -23,12 +23,12 @@
include $(TOPDIR)/config.mk
-LIB := $(obj)libnand_legacy.a
+LIB := $(obj)libnand_legacy.a
-COBJS := nand_legacy.o
+COBJS := nand_legacy.o
-SRCS := $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
all: $(LIB)
diff --git a/drivers/mtd/nand_legacy/nand_legacy.c b/drivers/mtd/nand_legacy/nand_legacy.c
index 49d2ebb67d..fafefad60f 100644
--- a/drivers/mtd/nand_legacy/nand_legacy.c
+++ b/drivers/mtd/nand_legacy/nand_legacy.c
@@ -438,7 +438,7 @@ static int NanD_IdentChip(struct nand_chip *nand, int floor, int chip)
nand->erasesize = nand_flash_ids[i].erasesize;
nand->chips_name = nand_flash_ids[i].name;
nand->bus16 = nand_flash_ids[i].bus16;
- return 1;
+ return 1;
}
return 0;
}
@@ -638,10 +638,10 @@ static int nand_read_ecc(struct nand_chip *nand, size_t start, size_t len,
/* Send the read command */
NanD_Command(nand, NAND_CMD_READ0);
if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
+ NanD_Address(nand, ADDR_COLUMN_PAGE,
(page << nand->page_shift) + (col >> 1));
} else {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
+ NanD_Address(nand, ADDR_COLUMN_PAGE,
(page << nand->page_shift) + col);
}
@@ -989,7 +989,7 @@ static int nand_write_ecc (struct nand_chip* nand, size_t to, size_t len,
NAND_WP_OFF();
#endif
- NAND_ENABLE_CE(nand); /* set pin low */
+ NAND_ENABLE_CE(nand); /* set pin low */
/* Check the WP bit */
NanD_Command(nand, NAND_CMD_STATUS);
@@ -1037,7 +1037,7 @@ out:
/* De-select the NAND device */
NAND_DISABLE_CE(nand); /* set pin high */
#ifdef CONFIG_OMAP1510
- archflashwp(0,1);
+ archflashwp(0,1);
#endif
#ifdef CFG_NAND_WP
NAND_WP_ON();
@@ -1070,9 +1070,9 @@ int nand_read_oob(struct nand_chip* nand, size_t ofs, size_t len,
NAND_ENABLE_CE(nand); /* set pin low */
NanD_Command(nand, NAND_CMD_READOOB);
if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
+ NanD_Address(nand, ADDR_COLUMN_PAGE,
((ofs >> nand->page_shift) << nand->page_shift) +
- ((ofs & (nand->oobblock - 1)) >> 1));
+ ((ofs & (nand->oobblock - 1)) >> 1));
} else {
NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
}
@@ -1126,11 +1126,11 @@ int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
/* issue the Read2 command to set the pointer to the Spare Data Area. */
NanD_Command(nand, NAND_CMD_READOOB);
if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
+ NanD_Address(nand, ADDR_COLUMN_PAGE,
((ofs >> nand->page_shift) << nand->page_shift) +
- ((ofs & (nand->oobblock - 1)) >> 1));
+ ((ofs & (nand->oobblock - 1)) >> 1));
} else {
- NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
+ NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
}
/* update address for 2M x 8bit devices. OOB starts on the second */
@@ -1145,11 +1145,11 @@ int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
/* issue the Serial Data In command to initial the Page Program process */
NanD_Command(nand, NAND_CMD_SEQIN);
if (nand->bus16) {
- NanD_Address(nand, ADDR_COLUMN_PAGE,
+ NanD_Address(nand, ADDR_COLUMN_PAGE,
((ofs >> nand->page_shift) << nand->page_shift) +
- ((ofs & (nand->oobblock - 1)) >> 1));
+ ((ofs & (nand->oobblock - 1)) >> 1));
} else {
- NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
+ NanD_Address(nand, ADDR_COLUMN_PAGE, ofs);
}
/* treat crossing 8-byte OOB data for 2M x 8bit devices */
@@ -1163,7 +1163,7 @@ int nand_write_oob(struct nand_chip* nand, size_t ofs, size_t len,
NanD_Command(nand, NAND_CMD_PAGEPROG);
NanD_Command(nand, NAND_CMD_STATUS);
#ifdef NAND_NO_RB
- { u_char ret_val;
+ { u_char ret_val;
do {
ret_val = READ_NAND(nandptr); /* wait till ready */
} while ((ret_val & 0x40) != 0x40);
@@ -1322,7 +1322,7 @@ out:
/* De-select the NAND device */
NAND_DISABLE_CE(nand); /* set pin high */
#ifdef CONFIG_OMAP1510
- archflashwp(0,1);
+ archflashwp(0,1);
#endif
#ifdef CFG_NAND_WP
NAND_WP_ON();
diff --git a/drivers/mtd/spi/Makefile b/drivers/mtd/spi/Makefile
new file mode 100644
index 0000000000..af6af97d11
--- /dev/null
+++ b/drivers/mtd/spi/Makefile
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB := $(obj)libspi_flash.a
+
+COBJS-$(CONFIG_SPI_FLASH) += spi_flash.o
+COBJS-$(CONFIG_SPI_FLASH_ATMEL) += atmel.o
+
+COBJS := $(COBJS-y)
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+all: $(LIB)
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/drivers/mtd/spi/atmel.c b/drivers/mtd/spi/atmel.c
new file mode 100644
index 0000000000..fb7a4a939b
--- /dev/null
+++ b/drivers/mtd/spi/atmel.c
@@ -0,0 +1,362 @@
+/*
+ * Atmel SPI DataFlash support
+ *
+ * Copyright (C) 2008 Atmel Corporation
+ */
+#define DEBUG
+#include <common.h>
+#include <malloc.h>
+#include <spi_flash.h>
+
+#include "spi_flash_internal.h"
+
+/* AT45-specific commands */
+#define CMD_AT45_READ_STATUS 0xd7
+#define CMD_AT45_ERASE_PAGE 0x81
+#define CMD_AT45_LOAD_PROG_BUF1 0x82
+#define CMD_AT45_LOAD_BUF1 0x84
+#define CMD_AT45_LOAD_PROG_BUF2 0x85
+#define CMD_AT45_LOAD_BUF2 0x87
+#define CMD_AT45_PROG_BUF1 0x88
+#define CMD_AT45_PROG_BUF2 0x89
+
+/* AT45 status register bits */
+#define AT45_STATUS_P2_PAGE_SIZE (1 << 0)
+#define AT45_STATUS_READY (1 << 7)
+
+/* DataFlash family IDs, as obtained from the second idcode byte */
+#define DF_FAMILY_AT26F 0
+#define DF_FAMILY_AT45 1
+#define DF_FAMILY_AT26DF 2 /* AT25DF and AT26DF */
+
+struct atmel_spi_flash_params {
+ u8 idcode1;
+ /* Log2 of page size in power-of-two mode */
+ u8 l2_page_size;
+ u8 pages_per_block;
+ u8 blocks_per_sector;
+ u8 nr_sectors;
+ const char *name;
+};
+
+struct atmel_spi_flash {
+ const struct atmel_spi_flash_params *params;
+ struct spi_flash flash;
+};
+
+static inline struct atmel_spi_flash *
+to_atmel_spi_flash(struct spi_flash *flash)
+{
+ return container_of(flash, struct atmel_spi_flash, flash);
+}
+
+static const struct atmel_spi_flash_params atmel_spi_flash_table[] = {
+ {
+ .idcode1 = 0x28,
+ .l2_page_size = 10,
+ .pages_per_block = 8,
+ .blocks_per_sector = 32,
+ .nr_sectors = 32,
+ .name = "AT45DB642D",
+ },
+};
+
+static int at45_wait_ready(struct spi_flash *flash, unsigned long timeout)
+{
+ struct spi_slave *spi = flash->spi;
+ unsigned long timebase;
+ int ret;
+ u8 cmd = CMD_AT45_READ_STATUS;
+ u8 status;
+
+ timebase = get_timer(0);
+
+ ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
+ if (ret)
+ return -1;
+
+ do {
+ ret = spi_xfer(spi, 8, NULL, &status, 0);
+ if (ret)
+ return -1;
+
+ if (status & AT45_STATUS_READY)
+ break;
+ } while (get_timer(timebase) < timeout);
+
+ /* Deactivate CS */
+ spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
+
+ if (status & AT45_STATUS_READY)
+ return 0;
+
+ /* Timed out */
+ return -1;
+}
+
+/*
+ * Assemble the address part of a command for AT45 devices in
+ * non-power-of-two page size mode.
+ */
+static void at45_build_address(struct atmel_spi_flash *asf, u8 *cmd, u32 offset)
+{
+ unsigned long page_addr;
+ unsigned long byte_addr;
+ unsigned long page_size;
+ unsigned int page_shift;
+
+ /*
+ * The "extra" space per page is the power-of-two page size
+ * divided by 32.
+ */
+ page_shift = asf->params->l2_page_size;
+ page_size = (1 << page_shift) + (1 << (page_shift - 5));
+ page_shift++;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ cmd[0] = page_addr >> (16 - page_shift);
+ cmd[1] = page_addr << (page_shift - 8) | (byte_addr >> 8);
+ cmd[2] = byte_addr;
+}
+
+static int dataflash_read_fast_p2(struct spi_flash *flash,
+ u32 offset, size_t len, void *buf)
+{
+ u8 cmd[5];
+
+ cmd[0] = CMD_READ_ARRAY_FAST;
+ cmd[1] = offset >> 16;
+ cmd[2] = offset >> 8;
+ cmd[3] = offset;
+ cmd[4] = 0x00;
+
+ return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len);
+}
+
+static int dataflash_read_fast_at45(struct spi_flash *flash,
+ u32 offset, size_t len, void *buf)
+{
+ struct atmel_spi_flash *asf = to_atmel_spi_flash(flash);
+ u8 cmd[5];
+
+ cmd[0] = CMD_READ_ARRAY_FAST;
+ at45_build_address(asf, cmd + 1, offset);
+ cmd[4] = 0x00;
+
+ return spi_flash_read_common(flash, cmd, sizeof(cmd), buf, len);
+}
+
+static int dataflash_write_at45(struct spi_flash *flash,
+ u32 offset, size_t len, const void *buf)
+{
+ struct atmel_spi_flash *asf = to_atmel_spi_flash(flash);
+ unsigned long page_addr;
+ unsigned long byte_addr;
+ unsigned long page_size;
+ unsigned int page_shift;
+ size_t chunk_len;
+ size_t actual;
+ int ret;
+ u8 cmd[4];
+
+ page_shift = asf->params->l2_page_size;
+ page_size = (1 << page_shift) + (1 << (page_shift - 5));
+ page_shift++;
+ page_addr = offset / page_size;
+ byte_addr = offset % page_size;
+
+ ret = spi_claim_bus(flash->spi);
+ if (ret) {
+ debug("SF: Unable to claim SPI bus\n");
+ return ret;
+ }
+
+ for (actual = 0; actual < len; actual += chunk_len) {
+ chunk_len = min(len - actual, page_size - byte_addr);
+
+ /* Use the same address bits for both commands */
+ cmd[0] = CMD_AT45_LOAD_BUF1;
+ cmd[1] = page_addr >> (16 - page_shift);
+ cmd[2] = page_addr << (page_shift - 8) | (byte_addr >> 8);
+ cmd[3] = byte_addr;
+
+ ret = spi_flash_cmd_write(flash->spi, cmd, 4,
+ buf + actual, chunk_len);
+ if (ret < 0) {
+ debug("SF: Loading AT45 buffer failed\n");
+ goto out;
+ }
+
+ cmd[0] = CMD_AT45_PROG_BUF1;
+ ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0);
+ if (ret < 0) {
+ debug("SF: AT45 page programming failed\n");
+ goto out;
+ }
+
+ ret = at45_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT);
+ if (ret < 0) {
+ debug("SF: AT45 page programming timed out\n");
+ goto out;
+ }
+
+ page_addr++;
+ byte_addr = 0;
+ }
+
+ debug("SF: AT45: Successfully programmed %u bytes @ 0x%x\n",
+ len, offset);
+ ret = 0;
+
+out:
+ spi_release_bus(flash->spi);
+ return ret;
+}
+
+int dataflash_erase_at45(struct spi_flash *flash, u32 offset, size_t len)
+{
+ struct atmel_spi_flash *asf = to_atmel_spi_flash(flash);
+ unsigned long page_addr;
+ unsigned long page_size;
+ unsigned int page_shift;
+ size_t actual;
+ int ret;
+ u8 cmd[4];
+
+ /*
+ * TODO: This function currently uses page erase only. We can
+ * probably speed things up by using block and/or sector erase
+ * when possible.
+ */
+
+ page_shift = asf->params->l2_page_size;
+ page_size = (1 << page_shift) + (1 << (page_shift - 5));
+ page_shift++;
+ page_addr = offset / page_size;
+
+ if (offset % page_size || len % page_size) {
+ debug("SF: Erase offset/length not multiple of page size\n");
+ return -1;
+ }
+
+ cmd[0] = CMD_AT45_ERASE_PAGE;
+ cmd[3] = 0x00;
+
+ ret = spi_claim_bus(flash->spi);
+ if (ret) {
+ debug("SF: Unable to claim SPI bus\n");
+ return ret;
+ }
+
+ for (actual = 0; actual < len; actual += page_size) {
+ cmd[1] = page_addr >> (16 - page_shift);
+ cmd[2] = page_addr << (page_shift - 8);
+
+ ret = spi_flash_cmd_write(flash->spi, cmd, 4, NULL, 0);
+ if (ret < 0) {
+ debug("SF: AT45 page erase failed\n");
+ goto out;
+ }
+
+ ret = at45_wait_ready(flash, SPI_FLASH_PAGE_ERASE_TIMEOUT);
+ if (ret < 0) {
+ debug("SF: AT45 page erase timed out\n");
+ goto out;
+ }
+
+ page_addr++;
+ }
+
+ debug("SF: AT45: Successfully erased %u bytes @ 0x%x\n",
+ len, offset);
+ ret = 0;
+
+out:
+ spi_release_bus(flash->spi);
+ return ret;
+}
+
+struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode)
+{
+ const struct atmel_spi_flash_params *params;
+ unsigned long page_size;
+ unsigned int family;
+ struct atmel_spi_flash *asf;
+ unsigned int i;
+ int ret;
+ u8 status;
+
+ for (i = 0; i < ARRAY_SIZE(atmel_spi_flash_table); i++) {
+ params = &atmel_spi_flash_table[i];
+ if (params->idcode1 == idcode[1])
+ break;
+ }
+
+ if (i == ARRAY_SIZE(atmel_spi_flash_table)) {
+ debug("SF: Unsupported DataFlash ID %02x\n",
+ idcode[1]);
+ return NULL;
+ }
+
+ asf = malloc(sizeof(struct atmel_spi_flash));
+ if (!asf) {
+ debug("SF: Failed to allocate memory\n");
+ return NULL;
+ }
+
+ asf->params = params;
+ asf->flash.spi = spi;
+ asf->flash.name = params->name;
+
+ /* Assuming power-of-two page size initially. */
+ page_size = 1 << params->l2_page_size;
+
+ family = idcode[1] >> 5;
+
+ switch (family) {
+ case DF_FAMILY_AT45:
+ /*
+ * AT45 chips have configurable page size. The status
+ * register indicates which configuration is active.
+ */
+ ret = spi_flash_cmd(spi, CMD_AT45_READ_STATUS, &status, 1);
+ if (ret)
+ goto err;
+
+ debug("SF: AT45 status register: %02x\n", status);
+
+ if (!(status & AT45_STATUS_P2_PAGE_SIZE)) {
+ asf->flash.read = dataflash_read_fast_at45;
+ asf->flash.write = dataflash_write_at45;
+ asf->flash.erase = dataflash_erase_at45;
+ page_size += 1 << (params->l2_page_size - 5);
+ } else {
+ asf->flash.read = dataflash_read_fast_p2;
+ }
+
+ break;
+
+ case DF_FAMILY_AT26F:
+ case DF_FAMILY_AT26DF:
+ asf->flash.read = dataflash_read_fast_p2;
+ break;
+
+ default:
+ debug("SF: Unsupported DataFlash family %u\n", family);
+ goto err;
+ }
+
+ asf->flash.size = page_size * params->pages_per_block
+ * params->blocks_per_sector
+ * params->nr_sectors;
+
+ debug("SF: Detected %s with page size %u, total %u bytes\n",
+ params->name, page_size, asf->flash.size);
+
+ return &asf->flash;
+
+err:
+ free(asf);
+ return NULL;
+}
diff --git a/drivers/mtd/spi/spi_flash.c b/drivers/mtd/spi/spi_flash.c
new file mode 100644
index 0000000000..d581cb3e89
--- /dev/null
+++ b/drivers/mtd/spi/spi_flash.c
@@ -0,0 +1,162 @@
+/*
+ * SPI flash interface
+ *
+ * Copyright (C) 2008 Atmel Corporation
+ */
+#define DEBUG
+#include <common.h>
+#include <malloc.h>
+#include <spi.h>
+#include <spi_flash.h>
+
+#include "spi_flash_internal.h"
+
+int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
+{
+ unsigned long flags = SPI_XFER_BEGIN;
+ int ret;
+
+ if (len == 0)
+ flags |= SPI_XFER_END;
+
+ ret = spi_xfer(spi, 8, &cmd, NULL, flags);
+ if (ret) {
+ debug("SF: Failed to send command %02x: %d\n", cmd, ret);
+ return ret;
+ }
+
+ if (len) {
+ ret = spi_xfer(spi, len * 8, NULL, response, SPI_XFER_END);
+ if (ret)
+ debug("SF: Failed to read response (%zu bytes): %d\n",
+ len, ret);
+ }
+
+ return ret;
+}
+
+int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
+ size_t cmd_len, void *data, size_t data_len)
+{
+ unsigned long flags = SPI_XFER_BEGIN;
+ int ret;
+
+ if (data_len == 0)
+ flags |= SPI_XFER_END;
+
+ ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
+ if (ret) {
+ debug("SF: Failed to send read command (%zu bytes): %d\n",
+ cmd_len, ret);
+ } else if (data_len != 0) {
+ ret = spi_xfer(spi, data_len * 8, NULL, data, SPI_XFER_END);
+ if (ret)
+ debug("SF: Failed to read %zu bytes of data: %d\n",
+ data_len, ret);
+ }
+
+ return ret;
+}
+
+int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
+ const void *data, size_t data_len)
+{
+ unsigned long flags = SPI_XFER_BEGIN;
+ int ret;
+
+ if (data_len == 0)
+ flags |= SPI_XFER_END;
+
+ ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
+ if (ret) {
+ debug("SF: Failed to send read command (%zu bytes): %d\n",
+ cmd_len, ret);
+ } else if (data_len != 0) {
+ ret = spi_xfer(spi, data_len * 8, data, NULL, SPI_XFER_END);
+ if (ret)
+ debug("SF: Failed to read %zu bytes of data: %d\n",
+ data_len, ret);
+ }
+
+ return ret;
+}
+
+
+int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
+ size_t cmd_len, void *data, size_t data_len)
+{
+ struct spi_slave *spi = flash->spi;
+ int ret;
+
+ spi_claim_bus(spi);
+ ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
+ spi_release_bus(spi);
+
+ return ret;
+}
+
+struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
+ unsigned int max_hz, unsigned int spi_mode)
+{
+ struct spi_slave *spi;
+ struct spi_flash *flash;
+ int ret;
+ u8 idcode[3];
+
+ spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
+ if (!spi) {
+ debug("SF: Failed to set up slave\n");
+ return NULL;
+ }
+
+ ret = spi_claim_bus(spi);
+ if (ret) {
+ debug("SF: Failed to claim SPI bus: %d\n", ret);
+ goto err_claim_bus;
+ }
+
+ /* Read the ID codes */
+ ret = spi_flash_cmd(spi, CMD_READ_ID, &idcode, sizeof(idcode));
+ if (ret)
+ goto err_read_id;
+
+ debug("SF: Got idcode %02x %02x %02x\n", idcode[0],
+ idcode[1], idcode[2]);
+
+ switch (idcode[0]) {
+#ifdef CONFIG_SPI_FLASH_SPANSION
+ case 0x01:
+ flash = spi_flash_probe_spansion(spi, idcode);
+ break;
+#endif
+#ifdef CONFIG_SPI_FLASH_ATMEL
+ case 0x1F:
+ flash = spi_flash_probe_atmel(spi, idcode);
+ break;
+#endif
+ default:
+ debug("SF: Unsupported manufacturer %02X\n", idcode[0]);
+ flash = NULL;
+ break;
+ }
+
+ if (!flash)
+ goto err_manufacturer_probe;
+
+ spi_release_bus(spi);
+
+ return flash;
+
+err_manufacturer_probe:
+err_read_id:
+ spi_release_bus(spi);
+err_claim_bus:
+ spi_free_slave(spi);
+ return NULL;
+}
+
+void spi_flash_free(struct spi_flash *flash)
+{
+ spi_free_slave(flash->spi);
+ free(flash);
+}
diff --git a/drivers/mtd/spi/spi_flash_internal.h b/drivers/mtd/spi/spi_flash_internal.h
new file mode 100644
index 0000000000..14380500aa
--- /dev/null
+++ b/drivers/mtd/spi/spi_flash_internal.h
@@ -0,0 +1,45 @@
+/*
+ * SPI flash internal definitions
+ *
+ * Copyright (C) 2008 Atmel Corporation
+ */
+
+/* Common parameters */
+#define SPI_FLASH_PROG_TIMEOUT ((10 * CFG_HZ) / 1000)
+#define SPI_FLASH_PAGE_ERASE_TIMEOUT ((50 * CFG_HZ) / 1000)
+#define SPI_FLASH_SECTOR_ERASE_TIMEOUT (10 * CFG_HZ)
+
+/* Common commands */
+#define CMD_READ_ID 0x9f
+
+#define CMD_READ_ARRAY_SLOW 0x03
+#define CMD_READ_ARRAY_FAST 0x0b
+#define CMD_READ_ARRAY_LEGACY 0xe8
+
+/* Send a single-byte command to the device and read the response */
+int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len);
+
+/*
+ * Send a multi-byte command to the device and read the response. Used
+ * for flash array reads, etc.
+ */
+int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
+ size_t cmd_len, void *data, size_t data_len);
+
+/*
+ * Send a multi-byte command to the device followed by (optional)
+ * data. Used for programming the flash array, etc.
+ */
+int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
+ const void *data, size_t data_len);
+
+/*
+ * Same as spi_flash_cmd_read() except it also claims/releases the SPI
+ * bus. Used as common part of the ->read() operation.
+ */
+int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
+ size_t cmd_len, void *data, size_t data_len);
+
+/* Manufacturer-specific probe functions */
+struct spi_flash *spi_flash_probe_spansion(struct spi_slave *spi, u8 *idcode);
+struct spi_flash *spi_flash_probe_atmel(struct spi_slave *spi, u8 *idcode);
generated by cgit v1.2.3 (git 2.39.0) at 2024-10-23 14:32:00 +0300