diff options
Diffstat (limited to 'arch/riscv/dts/jh7110.dtsi')
| -rw-r--r-- | arch/riscv/dts/jh7110.dtsi | 35 |
1 files changed, 14 insertions, 21 deletions
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi index f3f830f5f3..80d99ec64f 100644 --- a/arch/riscv/dts/jh7110.dtsi +++ b/arch/riscv/dts/jh7110.dtsi @@ -626,9 +626,8 @@ i2c0: i2c@10030000 { compatible = "snps,designware-i2c"; reg = <0x0 0x10030000 0x0 0x10000>; - clocks = <&clkgen JH7110_I2C0_CLK_CORE>, - <&clkgen JH7110_I2C0_CLK_APB>; - clock-names = "ref", "pclk"; + clocks = <&clkgen JH7110_I2C0_CLK_APB>; + clock-names = "pclk"; resets = <&rstgen RSTN_U0_DW_I2C_APB>; interrupts = <35>; #address-cells = <1>; @@ -639,9 +638,8 @@ i2c1: i2c@10040000 { compatible = "snps,designware-i2c"; reg = <0x0 0x10040000 0x0 0x10000>; - clocks = <&clkgen JH7110_I2C1_CLK_CORE>, - <&clkgen JH7110_I2C1_CLK_APB>; - clock-names = "ref", "pclk"; + clocks = <&clkgen JH7110_I2C1_CLK_APB>; + clock-names = "pclk"; resets = <&rstgen RSTN_U1_DW_I2C_APB>; interrupts = <36>; #address-cells = <1>; @@ -652,9 +650,8 @@ i2c2: i2c@10050000 { compatible = "snps,designware-i2c"; reg = <0x0 0x10050000 0x0 0x10000>; - clocks = <&clkgen JH7110_I2C2_CLK_CORE>, - <&clkgen JH7110_I2C2_CLK_APB>; - clock-names = "ref", "pclk"; + clocks = <&clkgen JH7110_I2C2_CLK_APB>; + clock-names = "pclk"; resets = <&rstgen RSTN_U2_DW_I2C_APB>; interrupts = <37>; #address-cells = <1>; @@ -665,9 +662,8 @@ i2c3: i2c@12030000 { compatible = "snps,designware-i2c"; reg = <0x0 0x12030000 0x0 0x10000>; - clocks = <&clkgen JH7110_I2C3_CLK_CORE>, - <&clkgen JH7110_I2C3_CLK_APB>; - clock-names = "ref", "pclk"; + clocks = <&clkgen JH7110_I2C3_CLK_APB>; + clock-names = "pclk"; resets = <&rstgen RSTN_U3_DW_I2C_APB>; interrupts = <48>; #address-cells = <1>; @@ -678,9 +674,8 @@ i2c4: i2c@12040000 { compatible = "snps,designware-i2c"; reg = <0x0 0x12040000 0x0 0x10000>; - clocks = <&clkgen JH7110_I2C4_CLK_CORE>, - <&clkgen JH7110_I2C4_CLK_APB>; - clock-names = "ref", "pclk"; + clocks = <&clkgen JH7110_I2C4_CLK_APB>; + clock-names = "pclk"; resets = <&rstgen RSTN_U4_DW_I2C_APB>; interrupts = <49>; #address-cells = <1>; @@ -691,9 +686,8 @@ i2c5: i2c5@12050000 { compatible = "snps,designware-i2c"; reg = <0x0 0x12050000 0x0 0x10000>; - clocks = <&clkgen JH7110_I2C5_CLK_CORE>, - <&clkgen JH7110_I2C5_CLK_APB>; - clock-names = "ref", "pclk"; + clocks = <&clkgen JH7110_I2C5_CLK_APB>; + clock-names = "pclk"; resets = <&rstgen RSTN_U5_DW_I2C_APB>; interrupts = <50>; #address-cells = <1>; @@ -704,9 +698,8 @@ i2c6: i2c@12060000 { compatible = "snps,designware-i2c"; reg = <0x0 0x12060000 0x0 0x10000>; - clocks = <&clkgen JH7110_I2C6_CLK_CORE>, - <&clkgen JH7110_I2C6_CLK_APB>; - clock-names = "ref", "pclk"; + clocks = <&clkgen JH7110_I2C6_CLK_APB>; + clock-names = "pclk"; resets = <&rstgen RSTN_U6_DW_I2C_APB>; interrupts = <51>; #address-cells = <1>; |