diff options
author | Tom Rini <trini@konsulko.com> | 2021-08-26 18:47:59 +0300 |
---|---|---|
committer | Tom Rini <trini@konsulko.com> | 2021-09-01 00:47:49 +0300 |
commit | ab92b38a0161f0d8efa1c2112d944ef8f755dfbe (patch) | |
tree | f4413fb22813b940ce12ca5079c67c7149ade8e3 /include | |
parent | e4ddf14305b28e788e09a9b1b5b2b2474234eb91 (diff) | |
download | u-boot-ab92b38a0161f0d8efa1c2112d944ef8f755dfbe.tar.xz |
Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig
We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Diffstat (limited to 'include')
-rw-r--r-- | include/configs/M5208EVBE.h | 1 | ||||
-rw-r--r-- | include/configs/M5235EVB.h | 1 | ||||
-rw-r--r-- | include/configs/M5249EVB.h | 1 | ||||
-rw-r--r-- | include/configs/M5253DEMO.h | 1 | ||||
-rw-r--r-- | include/configs/M5272C3.h | 1 | ||||
-rw-r--r-- | include/configs/M5275EVB.h | 1 | ||||
-rw-r--r-- | include/configs/M5282EVB.h | 1 | ||||
-rw-r--r-- | include/configs/M53017EVB.h | 1 | ||||
-rw-r--r-- | include/configs/M5329EVB.h | 1 | ||||
-rw-r--r-- | include/configs/M5373EVB.h | 1 | ||||
-rw-r--r-- | include/configs/amcore.h | 1 | ||||
-rw-r--r-- | include/configs/astro_mcf5373l.h | 1 | ||||
-rw-r--r-- | include/configs/cobra5272.h | 1 | ||||
-rw-r--r-- | include/configs/eb_cpu5282.h | 1 | ||||
-rw-r--r-- | include/configs/mx7ulp_evk.h | 2 | ||||
-rw-r--r-- | include/configs/rk3188_common.h | 2 | ||||
-rw-r--r-- | include/configs/rk3368_common.h | 2 | ||||
-rw-r--r-- | include/configs/sifive-unmatched.h | 2 | ||||
-rw-r--r-- | include/configs/sipeed-maix.h | 1 | ||||
-rw-r--r-- | include/configs/stmark2.h | 1 |
20 files changed, 0 insertions, 24 deletions
diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h index d75946b022..93a2806a8a 100644 --- a/include/configs/M5208EVBE.h +++ b/include/configs/M5208EVBE.h @@ -131,7 +131,6 @@ env/embedded.o(.text*); /* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h index b0e6ed4e1d..22c593851f 100644 --- a/include/configs/M5235EVB.h +++ b/include/configs/M5235EVB.h @@ -147,7 +147,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h index a8734697c1..2e8bbbb530 100644 --- a/include/configs/M5249EVB.h +++ b/include/configs/M5249EVB.h @@ -102,7 +102,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h index e1f54571d2..cc7126c76e 100644 --- a/include/configs/M5253DEMO.h +++ b/include/configs/M5253DEMO.h @@ -153,7 +153,6 @@ #endif /* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h index 35977cc5c2..02b8e373a7 100644 --- a/include/configs/M5272C3.h +++ b/include/configs/M5272C3.h @@ -133,7 +133,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h index f66ecc8e8f..29b0f7b67f 100644 --- a/include/configs/M5275EVB.h +++ b/include/configs/M5275EVB.h @@ -140,7 +140,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h index acaa2f1a96..fb60ec87da 100644 --- a/include/configs/M5282EVB.h +++ b/include/configs/M5282EVB.h @@ -140,7 +140,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h index adb6cc4dda..7ee38f810b 100644 --- a/include/configs/M53017EVB.h +++ b/include/configs/M53017EVB.h @@ -151,7 +151,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h index fc6cd2c0ec..cce6b560f1 100644 --- a/include/configs/M5329EVB.h +++ b/include/configs/M5329EVB.h @@ -158,7 +158,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h index 0b3ee11e0c..d0bb8a121f 100644 --- a/include/configs/M5373EVB.h +++ b/include/configs/M5373EVB.h @@ -160,7 +160,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/amcore.h b/include/configs/amcore.h index 63b941a56b..8376eb14d2 100644 --- a/include/configs/amcore.h +++ b/include/configs/amcore.h @@ -71,7 +71,6 @@ * This is a single unified instruction/data cache. * sdram - single region - no masks */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h index 5e117fb218..63e7e120f8 100644 --- a/include/configs/astro_mcf5373l.h +++ b/include/configs/astro_mcf5373l.h @@ -264,7 +264,6 @@ #endif /* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h index 054b659abf..c68cf11140 100644 --- a/include/configs/cobra5272.h +++ b/include/configs/cobra5272.h @@ -234,7 +234,6 @@ enter a valid image address in flash */ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h index e4da694834..97eedcf801 100644 --- a/include/configs/eb_cpu5282.h +++ b/include/configs/eb_cpu5282.h @@ -133,7 +133,6 @@ /*----------------------------------------------------------------------- * Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h index e7d776a72c..fc2f8d83b8 100644 --- a/include/configs/mx7ulp_evk.h +++ b/include/configs/mx7ulp_evk.h @@ -33,8 +33,6 @@ /* UART */ #define LPUART_BASE LPUART4_RBASE -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* Miscellaneous configurable options */ #define CONFIG_SYS_PROMPT "=> " #define CONFIG_SYS_CBSIZE 512 diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h index b567943056..59a16a77aa 100644 --- a/include/configs/rk3188_common.h +++ b/include/configs/rk3188_common.h @@ -6,8 +6,6 @@ #ifndef __CONFIG_RK3188_COMMON_H #define __CONFIG_RK3188_COMMON_H -#define CONFIG_SYS_CACHELINE_SIZE 64 - #include <asm/arch-rockchip/hardware.h> #include "rockchip-common.h" diff --git a/include/configs/rk3368_common.h b/include/configs/rk3368_common.h index 43471b94e4..19a556921f 100644 --- a/include/configs/rk3368_common.h +++ b/include/configs/rk3368_common.h @@ -8,8 +8,6 @@ #include "rockchip-common.h" -#define CONFIG_SYS_CACHELINE_SIZE 64 - #include <asm/arch-rockchip/hardware.h> #include <linux/sizes.h> diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h index 4b655ec8ee..a51becb645 100644 --- a/include/configs/sifive-unmatched.h +++ b/include/configs/sifive-unmatched.h @@ -36,8 +36,6 @@ #define CONFIG_SYS_PCI_64BIT 1 /* enable 64-bit resources */ -#define CONFIG_SYS_CACHELINE_SIZE 64 - /* Environment options */ #ifndef CONFIG_SPL_BUILD diff --git a/include/configs/sipeed-maix.h b/include/configs/sipeed-maix.h index 5b12878552..34e726eb89 100644 --- a/include/configs/sipeed-maix.h +++ b/include/configs/sipeed-maix.h @@ -11,7 +11,6 @@ /* Start just below the second bank so we don't clobber it during reloc */ #define CONFIG_SYS_INIT_SP_ADDR 0x803FFFFF #define CONFIG_SYS_MALLOC_LEN SZ_128K -#define CONFIG_SYS_CACHELINE_SIZE 64 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define CONFIG_SYS_SDRAM_SIZE SZ_8M diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h index f6fa96a590..c73c48cef8 100644 --- a/include/configs/stmark2.h +++ b/include/configs/stmark2.h @@ -131,7 +131,6 @@ #endif /* Cache Configuration */ -#define CONFIG_SYS_CACHELINE_SIZE 16 #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE - 8) #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ |