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author | Jagan Teki <jagan@amarulasolutions.com> | 2019-02-27 21:57:01 +0300 |
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committer | Jagan Teki <jagan@amarulasolutions.com> | 2019-04-16 13:59:01 +0300 |
commit | 99a8a3114f1ddb9b1e245879ff7186b2a499064d (patch) | |
tree | 563e954f334bb2cd1c07f7ac124741fbecd52345 /board/sunxi | |
parent | d3a2c0586e01741e3763d67713f0e55746c46971 (diff) | |
download | u-boot-99a8a3114f1ddb9b1e245879ff7186b2a499064d.tar.xz |
board: sunxi: gmac: Remove Ethernet clock and reset
Since Ethernet clock and reset is now handling via
CLK and RESET frameworks via driver API's remove
explicit ccm writes.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Diffstat (limited to 'board/sunxi')
-rw-r--r-- | board/sunxi/gmac.c | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c index 826650c89b..d8fdf7728e 100644 --- a/board/sunxi/gmac.c +++ b/board/sunxi/gmac.c @@ -12,14 +12,6 @@ void eth_init_board(void) struct sunxi_ccm_reg *const ccm = (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; - /* Set up clock gating */ -#ifdef CONFIG_SUNXI_GEN_SUN6I - setbits_le32(&ccm->ahb_reset0_cfg, 0x1 << AHB_RESET_OFFSET_GMAC); - setbits_le32(&ccm->ahb_gate0, 0x1 << AHB_GATE_OFFSET_GMAC); -#else - setbits_le32(&ccm->ahb_gate1, 0x1 << AHB_GATE_OFFSET_GMAC); -#endif - /* Set MII clock */ #ifdef CONFIG_RGMII setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_INT_RGMII | |