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authorNeil Armstrong <narmstrong@baylibre.com>2020-09-10 11:48:15 +0300
committerNeil Armstrong <narmstrong@baylibre.com>2020-10-05 18:59:45 +0300
commit66d942740307e8199e0671bf667629cb9511436a (patch)
tree962ce51e62a76871bc70b42741dbd5483a03aa00 /arch/arm/include/asm
parent7ccc73773fb58efe710ccb1f9e855e73cf8b0b9d (diff)
downloadu-boot-66d942740307e8199e0671bf667629cb9511436a.tar.xz
phy: meson-gxl: remove invalid USB3 PHY driver
The registers which are managed by the meson-gxl-usb3 PHY driver are actually "USB control" registers (which are "glue" registers which manage OTG detection and routing of the OTG capable port between the DWC2 peripheral-only controller and the DWC3 host-only controller). Drop the meson-gxl-usb3 PHY driver now that the dwc3-meson-gxl-usb driver supports the USB control registers on GXL and GXM SoCs (these were previously managed by the meson-gxl-usb3 PHY driver). Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/arch-meson/usb-gx.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/include/asm/arch-meson/usb-gx.h b/arch/arm/include/asm/arch-meson/usb-gx.h
index 7200a4c31a..61f1809df9 100644
--- a/arch/arm/include/asm/arch-meson/usb-gx.h
+++ b/arch/arm/include/asm/arch-meson/usb-gx.h
@@ -11,7 +11,6 @@
/* TOFIX add set_mode to struct phy_ops */
void phy_meson_gxl_usb2_set_mode(struct phy *phy, enum usb_dr_mode mode);
-void phy_meson_gxl_usb3_set_mode(struct phy *phy, enum usb_dr_mode mode);
int dwc3_meson_gxl_force_mode(struct udevice *dev, enum usb_dr_mode mode);