diff options
author | Tom Rini <trini@konsulko.com> | 2021-09-11 00:37:43 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2021-10-03 18:59:22 +0300 |
commit | fa09b12dc5f67b5935fd40142e321bc13ed62b35 (patch) | |
tree | 333902209eae0ebe689fd28e7a59160f199881af /arch/arm/dts/k3-am65-main.dtsi | |
parent | 4698bb8c9433af051cc24002f40c14d5e977d7cb (diff) | |
download | u-boot-fa09b12dc5f67b5935fd40142e321bc13ed62b35.tar.xz |
arm: ti: k3: Resync dts files and bindings with Linux Kernel v5.14
This resyncs the dts files for all of the currently in-tree K3
platforms, along with relevant bindings, with the v5.14 Linux Kernel
release. Of note are that the main-navss/mcu-navss nodes were renamed
to main_navss / mcu_navss and so the u-boot.dtsi files needed to be
updated to match.
Tested on j721e_evm and am65x_evm.
Signed-off-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/dts/k3-am65-main.dtsi')
-rw-r--r-- | arch/arm/dts/k3-am65-main.dtsi | 74 |
1 files changed, 12 insertions, 62 deletions
diff --git a/arch/arm/dts/k3-am65-main.dtsi b/arch/arm/dts/k3-am65-main.dtsi index 669484b0dd..ba4e5d3e1e 100644 --- a/arch/arm/dts/k3-am65-main.dtsi +++ b/arch/arm/dts/k3-am65-main.dtsi @@ -84,8 +84,6 @@ main_uart0: serial@2800000 { compatible = "ti,am654-uart"; reg = <0x00 0x02800000 0x00 0x100>; - reg-shift = <2>; - reg-io-width = <4>; interrupts = <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <48000000>; current-speed = <115200>; @@ -95,8 +93,6 @@ main_uart1: serial@2810000 { compatible = "ti,am654-uart"; reg = <0x00 0x02810000 0x00 0x100>; - reg-shift = <2>; - reg-io-width = <4>; interrupts = <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <48000000>; power-domains = <&k3_pds 147 TI_SCI_PD_EXCLUSIVE>; @@ -105,8 +101,6 @@ main_uart2: serial@2820000 { compatible = "ti,am654-uart"; reg = <0x00 0x02820000 0x00 0x100>; - reg-shift = <2>; - reg-io-width = <4>; interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <48000000>; power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>; @@ -256,7 +250,7 @@ #size-cells = <0>; }; - sdhci0: sdhci@4f80000 { + sdhci0: mmc@4f80000 { compatible = "ti,am654-sdhci-5.1"; reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>; power-domains = <&k3_pds 47 TI_SCI_PD_EXCLUSIVE>; @@ -271,21 +265,16 @@ ti,otap-del-sel-sdr12 = <0x0>; ti,otap-del-sel-sdr25 = <0x0>; ti,otap-del-sel-sdr50 = <0x8>; - ti,otap-del-sel-sdr104 = <0x5>; + ti,otap-del-sel-sdr104 = <0x7>; ti,otap-del-sel-ddr50 = <0x5>; ti,otap-del-sel-ddr52 = <0x5>; ti,otap-del-sel-hs200 = <0x5>; ti,otap-del-sel-hs400 = <0x0>; - ti,itap-del-sel-legacy = <0xa>; - ti,itap-del-sel-mmc-hs = <0x1>; - ti,itap-del-sel-sdr12 = <0xa>; - ti,itap-del-sel-sdr25 = <0x1>; - ti,clkbuf-sel = <0x7>; ti,trm-icp = <0x8>; dma-coherent; }; - sdhci1: sdhci@4fa0000 { + sdhci1: mmc@4fa0000 { compatible = "ti,am654-sdhci-5.1"; reg = <0x0 0x4fa0000 0x0 0x260>, <0x0 0x4fb0000 0x0 0x134>; power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>; @@ -302,11 +291,8 @@ ti,otap-del-sel-ddr50 = <0x4>; ti,otap-del-sel-ddr52 = <0x4>; ti,otap-del-sel-hs200 = <0x7>; - ti,itap-del-sel-legacy = <0xa>; - ti,itap-del-sel-mmc-hs = <0x1>; - ti,itap-del-sel-sdr12 = <0xa>; - ti,itap-del-sel-sdr25 = <0x1>; ti,clkbuf-sel = <0x7>; + ti,otap-del-sel = <0x2>; ti,trm-icp = <0x8>; dma-coherent; }; @@ -440,8 +426,9 @@ #phy-cells = <0>; }; - intr_main_gpio: interrupt-controller0 { + intr_main_gpio: interrupt-controller@a00000 { compatible = "ti,sci-intr"; + reg = <0x0 0x00a00000 0x0 0x400>; ti,intr-trigger-type = <1>; interrupt-controller; interrupt-parent = <&gic500>; @@ -451,18 +438,19 @@ ti,interrupt-ranges = <0 392 32>; }; - main-navss { + main_navss: bus@30800000 { compatible = "simple-mfd"; #address-cells = <2>; #size-cells = <2>; - ranges; + ranges = <0x0 0x30800000 0x0 0x30800000 0x0 0xbc00000>; dma-coherent; dma-ranges; ti,sci-dev-id = <118>; - intr_main_navss: interrupt-controller1 { + intr_main_navss: interrupt-controller@310e0000 { compatible = "ti,sci-intr"; + reg = <0x0 0x310e0000 0x0 0x2000>; ti,intr-trigger-type = <4>; interrupt-controller; interrupt-parent = <&gic500>; @@ -714,6 +702,7 @@ dma-coherent; interrupts = <GIC_SPI 340 IRQ_TYPE_EDGE_RISING>; msi-map = <0x0 &gic_its 0x0 0x10000>; + device_type = "pci"; }; pcie0_ep: pcie-ep@5500000 { @@ -746,6 +735,7 @@ dma-coherent; interrupts = <GIC_SPI 355 IRQ_TYPE_EDGE_RISING>; msi-map = <0x0 &gic_its 0x10000 0x10000>; + device_type = "pci"; }; pcie1_ep: pcie-ep@5600000 { @@ -974,18 +964,6 @@ }; }; - icssg0_iep0: iep@2e000 { - compatible = "ti,am654-icss-iep"; - reg = <0x2e000 0x1000>; - clocks = <&icssg0_iepclk_mux>; - }; - - icssg0_iep1: iep@2f000 { - compatible = "ti,am654-icss-iep"; - reg = <0x2f000 0x1000>; - clocks = <&icssg0_iepclk_mux>; - }; - icssg0_mii_rt: mii-rt@32000 { compatible = "ti,pruss-mii", "syscon"; reg = <0x32000 0x100>; @@ -1077,7 +1055,6 @@ #address-cells = <1>; #size-cells = <0>; bus_freq = <1000000>; - status = "disabled"; }; }; @@ -1128,18 +1105,6 @@ }; }; - icssg1_iep0: iep@2e000 { - compatible = "ti,am654-icss-iep"; - reg = <0x2e000 0x1000>; - clocks = <&icssg1_iepclk_mux>; - }; - - icssg1_iep1: iep@2f000 { - compatible = "ti,am654-icss-iep"; - reg = <0x2f000 0x1000>; - clocks = <&icssg1_iepclk_mux>; - }; - icssg1_mii_rt: mii-rt@32000 { compatible = "ti,pruss-mii", "syscon"; reg = <0x32000 0x100>; @@ -1231,7 +1196,6 @@ #address-cells = <1>; #size-cells = <0>; bus_freq = <1000000>; - status = "disabled"; }; }; @@ -1282,18 +1246,6 @@ }; }; - icssg2_iep0: iep@2e000 { - compatible = "ti,am654-icss-iep"; - reg = <0x2e000 0x1000>; - clocks = <&icssg2_iepclk_mux>; - }; - - icssg2_iep1: iep@2f000 { - compatible = "ti,am654-icss-iep"; - reg = <0x2f000 0x1000>; - clocks = <&icssg2_iepclk_mux>; - }; - icssg2_mii_rt: mii-rt@32000 { compatible = "ti,pruss-mii", "syscon"; reg = <0x32000 0x100>; @@ -1385,8 +1337,6 @@ #address-cells = <1>; #size-cells = <0>; bus_freq = <1000000>; - status = "disabled"; }; }; - }; |