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| author | Mingkai Hu <mingkai.hu@nxp.com> | 2016-07-05 11:01:55 +0300 |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2016-07-26 19:02:23 +0300 |
| commit | b528b9377df0e738c6904a639a1e78810936f825 (patch) | |
| tree | ab3f786883fc5988efad56848cdc65dff803e34f /arch/arm/cpu/armv8/fsl-layerscape/Makefile | |
| parent | da4d620c90eb6dd9466a89837ab8667048d856e3 (diff) | |
| download | u-boot-b528b9377df0e738c6904a639a1e78810936f825.tar.xz | |
armv8: fsl_lsch2: Add LS1046A SoC support
The LS1046A processor is built on the QorIQ LS series architecture
combining four ARM A72 processor cores with DPAA 1.0 support.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: Mihai Bantea <mihai.bantea@freescale.com>
Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com>
Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape/Makefile')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/Makefile | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Makefile b/arch/arm/cpu/armv8/fsl-layerscape/Makefile index bcf6b48a51..8c1317faea 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/Makefile +++ b/arch/arm/cpu/armv8/fsl-layerscape/Makefile @@ -33,3 +33,7 @@ endif ifneq ($(CONFIG_LS1012A),) obj-$(CONFIG_SYS_HAS_SERDES) += ls1012a_serdes.o endif + +ifneq ($(CONFIG_LS1046A),) +obj-$(CONFIG_SYS_HAS_SERDES) += ls1046a_serdes.o +endif |