diff options
author | Kevin.xie <kevin.xie@starfivetech.com> | 2023-09-11 13:07:36 +0300 |
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committer | Kevin.xie <kevin.xie@starfivetech.com> | 2023-09-11 13:07:36 +0300 |
commit | 5a0cf0dd73a12522337bec07d7fa65895389d105 (patch) | |
tree | 99cd1eb9ee71870d5ca8ac83f63e8fae6e8d6d94 | |
parent | 081aa0e676156437fe6326402936c4d1f07818c1 (diff) | |
download | u-boot-5a0cf0dd73a12522337bec07d7fa65895389d105.tar.xz |
riscv: dts: Add link state register to PCIe syscon nodes.
Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
-rw-r--r-- | arch/riscv/dts/jh7110.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi index 1022a08db5..3f3098b96b 100644 --- a/arch/riscv/dts/jh7110.dtsi +++ b/arch/riscv/dts/jh7110.dtsi @@ -1197,7 +1197,7 @@ <0x9 0x40000000 0x0 0x10000000>; reg-names = "reg", "config"; device_type = "pci"; - starfive,stg-syscon = <&stg_syscon 0xc0 0xc4 0x130>; + starfive,stg-syscon = <&stg_syscon 0xc0 0xc4 0x130 0x1b8>; bus-range = <0x0 0xff>; ranges = <0x82000000 0x0 0x30000000 0x0 0x30000000 0x0 0x08000000>, <0xc3000000 0x9 0x00000000 0x9 0x00000000 0x0 0x40000000>; @@ -1236,7 +1236,7 @@ <0x9 0xc0000000 0x0 0x10000000>; reg-names = "reg", "config"; device_type = "pci"; - starfive,stg-syscon = <&stg_syscon 0x270 0x274 0x2e0>; + starfive,stg-syscon = <&stg_syscon 0x270 0x274 0x2e0 0x368>; bus-range = <0x0 0xff>; ranges = <0x82000000 0x0 0x38000000 0x0 0x38000000 0x0 0x08000000>, <0xc3000000 0x9 0x80000000 0x9 0x80000000 0x0 0x40000000>; |