diff options
author | woonjiet.chong <woonjiet.chong@starfivetech.com> | 2021-09-30 05:32:02 +0300 |
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committer | Wei Liang Lim <weiliang.lim@starfivetech.com> | 2023-10-18 09:05:27 +0300 |
commit | 5b47abbd7783a4253934723fb395a4f6081a9fcf (patch) | |
tree | d4375b7faf587cd7ae7bccefb82c9f5f62eea6a0 | |
parent | 1813fb1b66bdea66c7cf3073ab033ba5271888fb (diff) | |
download | u-boot-5b47abbd7783a4253934723fb395a4f6081a9fcf.tar.xz |
Add cpu dubhe
-rwxr-xr-x | arch/riscv/Kconfig | 1 | ||||
-rw-r--r-- | arch/riscv/cpu/dubhe/Kconfig | 17 | ||||
-rw-r--r-- | arch/riscv/cpu/dubhe/Makefile | 6 | ||||
-rw-r--r-- | arch/riscv/cpu/dubhe/cpu.c | 23 | ||||
-rw-r--r-- | arch/riscv/cpu/dubhe/dram.c | 38 | ||||
-rw-r--r-- | board/starfive/dubhe_fpga/Kconfig | 4 |
6 files changed, 87 insertions, 2 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index bfed12dbca..a0c1cd6c67 100755 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -94,6 +94,7 @@ source "arch/riscv/cpu/fu540/Kconfig" source "arch/riscv/cpu/fu740/Kconfig" source "arch/riscv/cpu/generic/Kconfig" source "arch/riscv/cpu/jh7110/Kconfig" +source "arch/riscv/cpu/dubhe/Kconfig" # architecture-specific options below diff --git a/arch/riscv/cpu/dubhe/Kconfig b/arch/riscv/cpu/dubhe/Kconfig new file mode 100644 index 0000000000..4412843c9f --- /dev/null +++ b/arch/riscv/cpu/dubhe/Kconfig @@ -0,0 +1,17 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2021 StarFive Technology Co., Ltd. + +config STARFIVE_DUBHE + bool + select BINMAN if SPL + select ARCH_EARLY_INIT_R + imply CPU + imply CPU_RISCV + imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE) + imply SIFIVE_CLINT if RISCV_MMODE + imply SPL_SIFIVE_CLINT if SPL_RISCV_MMODE + imply CMD_CPU + imply SPL_CPU + imply SPL_OPENSBI + imply SPL_LOAD_FIT diff --git a/arch/riscv/cpu/dubhe/Makefile b/arch/riscv/cpu/dubhe/Makefile new file mode 100644 index 0000000000..a6886d6cdc --- /dev/null +++ b/arch/riscv/cpu/dubhe/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (c) 2021 StarFive Technology Co., Ltd. + +obj-y += dram.o +obj-y += cpu.o diff --git a/arch/riscv/cpu/dubhe/cpu.c b/arch/riscv/cpu/dubhe/cpu.c new file mode 100644 index 0000000000..726d0e8ebe --- /dev/null +++ b/arch/riscv/cpu/dubhe/cpu.c @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2021 StarFive Technology Co., Ltd. + */ + +#include <common.h> +#include <irq_func.h> +#include <asm/cache.h> + +/* + * cleanup_before_linux() is called just before we call linux + * it prepares the processor for linux + * + * we disable interrupt and caches. + */ +int cleanup_before_linux(void) +{ + disable_interrupts(); + + cache_flush(); + + return 0; +} diff --git a/arch/riscv/cpu/dubhe/dram.c b/arch/riscv/cpu/dubhe/dram.c new file mode 100644 index 0000000000..e262ab811a --- /dev/null +++ b/arch/riscv/cpu/dubhe/dram.c @@ -0,0 +1,38 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2021 StarFive Technology Co., Ltd. + */ + +#include <common.h> +#include <fdtdec.h> +#include <init.h> +#include <asm/global_data.h> +#include <linux/sizes.h> + +DECLARE_GLOBAL_DATA_PTR; + +int dram_init(void) +{ + return fdtdec_setup_mem_size_base(); +} + +int dram_init_banksize(void) +{ + return fdtdec_setup_memory_banksize(); +} + +ulong board_get_usable_ram_top(ulong total_size) +{ + /* + * Ensure that we run from first 4GB so that all + * addresses used by U-Boot are 32bit addresses. + * + * This in-turn ensures that 32bit DMA capable + * devices work fine because DMA mapping APIs will + * provide 32bit DMA addresses only. + */ + if (gd->ram_top >= SZ_4G) + return SZ_4G - 1; + + return gd->ram_top; +} diff --git a/board/starfive/dubhe_fpga/Kconfig b/board/starfive/dubhe_fpga/Kconfig index 6852cec4d6..99fe0e8508 100644 --- a/board/starfive/dubhe_fpga/Kconfig +++ b/board/starfive/dubhe_fpga/Kconfig @@ -1,7 +1,7 @@ if TARGET_STARFIVE_DUBHE_FPGA config SYS_CPU - default "generic" + default "dubhe" config SYS_BOARD default "dubhe_fpga" @@ -28,7 +28,7 @@ config SPL_OPENSBI_LOAD_ADDR config BOARD_SPECIFIC_OPTIONS # dummy def_bool y - select GENERIC_RISCV + select STARFIVE_DUBHE select SUPPORT_SPL select BINMAN imply DM_SERIAL |