<feed xmlns='http://www.w3.org/2005/Atom'>
<title>starfive-tech/u-boot.git/tools/socfpgaimage.c, branch rtthread_AMP</title>
<subtitle>StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)</subtitle>
<id>https://git.radix-linux.su/starfive-tech/u-boot.git/atom?h=rtthread_AMP</id>
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<updated>2021-01-15T09:48:39+00:00</updated>
<entry>
<title>tools: socfpgaimage: update padding flow</title>
<updated>2021-01-15T09:48:39+00:00</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2021-01-13T10:53:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=40551cf99c237f93d9e0e07b6dd8f31b3868a0f0'/>
<id>urn:sha1:40551cf99c237f93d9e0e07b6dd8f31b3868a0f0</id>
<content type='text'>
The existing socfpgaimage always pads the image to the maximum size of
OCRAM size. This will break in the encryption flow where it expects the
image to be un-padded. The encryption tool will do the encryption for
the whole image and append the signature key at end of the image.
The signature key will append to beyond the size of OCRAM if the image
is padded with the maximum size before encryption.

Move the padding step from socfpgaimage to Makefile and pads with objcopy
command.

socfpgaimage will pad the image with 16 bytes aligned (including CRC word),
this is a requirement in encryption flow.

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
</content>
</entry>
<entry>
<title>tools: socfpgaimage: Print image header information</title>
<updated>2021-01-15T09:48:39+00:00</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2020-12-11T06:46:47+00:00</published>
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<id>urn:sha1:bcf33fac64998d4c0c030d0711e6b02039f71a8d</id>
<content type='text'>
Print image header information if the header is verified.

Example output from mkimage "-l" option:

$ ./tools/mkimage -l spl/u-boot-spl.sfp
Image Type      : Cyclone V / Arria V SoC Image
Validation word : 0x31305341
Version         : 0x00000000
Flags           : 0x00000000
Program length  : 0x00003a59
Header checksum : 0x00000188

$ ./tools/mkimage -l spl/u-boot-spl.sfp
Image Type      : Arria 10 SoC Image
Validation word : 0x31305341
Version         : 0x00000001
Flags           : 0x00000000
Header length   : 0x00000014
Program length  : 0x000138e0
Program entry   : 0x00000014
Header checksum : 0x00000237

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
</content>
</entry>
<entry>
<title>tools: socfpgaimage: Add param entry point (ep) support for Arria 10 (v1)</title>
<updated>2020-10-09T09:53:16+00:00</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2020-09-22T02:19:44+00:00</published>
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<id>urn:sha1:1d0dc5bc2dfe16863e37587a54168aa7e782900b</id>
<content type='text'>
Add param entry point (ep) support for Arria 10 header. User can pass in
'e' option to mkimage to set the entry point. This is an optional option.

If not specified, default is 0x14.

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
</content>
</entry>
<entry>
<title>tools: socfpgaimage: Add check params function for Arria 10 (v1)</title>
<updated>2020-10-09T09:53:15+00:00</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2020-09-09T03:34:30+00:00</published>
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<id>urn:sha1:963e17ab466a1f317a0839912c67d488a2aac801</id>
<content type='text'>
Add check params function for Arria 10 (header v1).

From [1] page 42, entry point offset should be 4 bytes aligned and
any value smaller than 0x14 is invalid.

Rename existing socfpgaimage_check_params() for v0.

[1]: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_soc_eds.pdf

Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
</content>
</entry>
<entry>
<title>tool: use ALIGN() to align the size</title>
<updated>2020-04-24T14:10:00+00:00</updated>
<author>
<name>Kever Yang</name>
<email>kever.yang@rock-chips.com</email>
</author>
<published>2020-03-30T03:56:22+00:00</published>
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<id>urn:sha1:02560b13689650cf0d2f5825eaf480629ce9238f</id>
<content type='text'>
Use the ALIGN() for size align so that the code is more readable.

Signed-off-by: Kever Yang &lt;kever.yang@rock-chips.com&gt;
Reviewed-by: Punit Agrawal &lt;punit1.agrawal@toshiba.co.jp&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Heinrich Schuchardt &lt;xypron.glpk@gmx.de&gt;
</content>
</entry>
<entry>
<title>crc32: Use the crc.h header for crc functions</title>
<updated>2019-12-02T23:23:08+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-11-14T19:57:16+00:00</published>
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<id>urn:sha1:3db7110857524cf1b7d0a374c1ebcde8a2680de0</id>
<content type='text'>
Drop inclusion of crc.h in common.h and use the correct header directly
instead.

With this we can drop the conflicting definition in fw_env.h and rely on
the crc.h header, which is already included.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>tools: socfpga: fix sfp_verify_header</title>
<updated>2018-10-03T10:56:50+00:00</updated>
<author>
<name>Atsushi Nemoto</name>
<email>atsushi.nemoto@sord.co.jp</email>
</author>
<published>2018-09-21T00:19:13+00:00</published>
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<id>urn:sha1:0ca8fd37ae86726747d5dd96f915967eceb64691</id>
<content type='text'>
Fix sfp_verify_header to return correct version number.
This fixes "Not a sane SOCFPGA preloader" error message with v1 header.

Signed-off-by: Atsushi Nemoto &lt;atsushi.nemoto@sord.co.jp&gt;
</content>
</entry>
<entry>
<title>tools: socfpga: Add SFP image V1 support</title>
<updated>2018-05-08T19:08:42+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2018-04-15T11:15:33+00:00</published>
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<id>urn:sha1:cece78fafed838462dd9b2404eac98472fe75b2e</id>
<content type='text'>
Add support for the SoCFPGA header v1 , which is used on Arria 10.
Thus far the mkimage-socfpga image only supported header format v0
used on Cyclone V and Arria V, but is not supported on Arria 10.
The layout of the v0 and v1 header is similar, yet there are a few
differences, see the patch body for details.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Cc: Chin Liang See &lt;chin.liang.see@intel.com&gt;
</content>
</entry>
<entry>
<title>tools: socfpga: Stop using global struct socfpga_image</title>
<updated>2018-05-08T19:08:42+00:00</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2018-04-15T11:38:49+00:00</published>
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<id>urn:sha1:9f0021a50b5a39a01f2ab3095a952a255660eb3f</id>
<content type='text'>
The structure is passed around correctly, create local instances
where necessary and zap the global struct socfpga_image instance.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Cc: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
Cc: Chin Liang See &lt;chin.liang.see@intel.com&gt;
</content>
</entry>
<entry>
<title>SPDX: Convert all of our single license tags to Linux Kernel style</title>
<updated>2018-05-07T13:34:12+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-05-06T21:58:06+00:00</published>
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<id>urn:sha1:83d290c56fab2d38cd1ab4c4cc7099559c1d5046</id>
<content type='text'>
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
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