<feed xmlns='http://www.w3.org/2005/Atom'>
<title>starfive-tech/u-boot.git/include/acpi/acpi_table.h, branch rtthread_AMP</title>
<subtitle>StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)</subtitle>
<id>https://git.radix-linux.su/starfive-tech/u-boot.git/atom?h=rtthread_AMP</id>
<link rel='self' href='https://git.radix-linux.su/starfive-tech/u-boot.git/atom?h=rtthread_AMP'/>
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<updated>2020-11-06T01:51:28+00:00</updated>
<entry>
<title>x86: Allow putting some tables in the bloblist</title>
<updated>2020-11-06T01:51:28+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-11-04T16:57:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=d2cb7a22da0fec2b67b356e9fb58247cdff8c95e'/>
<id>urn:sha1:d2cb7a22da0fec2b67b356e9fb58247cdff8c95e</id>
<content type='text'>
At present all tables are placed starting at address f0000 in memory, and
can be up to 64KB in size. If the tables are very large, this may not
provide enough space.

Also if the tables point to other tables (such as console log or a ramoops
area) then we must allocate other memory anyway.

The bloblist is a nice place to put these tables since it is contiguous,
which makes it easy to reserve this memory for linux using the 820 tables.

Add an option to put some of the tables in the bloblist. For SMBIOS and
ACPI, create suitable pointers from the f0000 region to the new location
of the tables.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
[bmeng: squashed in http://patchwork.ozlabs.org/project/uboot/patch/
 20201105062407.1.I8091ad931cbbb5e3b6f6ababdf3f8d5db0d17bb9@changeid/]
Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Move include of bitops out of ACPI region</title>
<updated>2020-09-25T03:27:25+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-09-22T18:45:41+00:00</published>
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<id>urn:sha1:ee3cb7c648988aa5f7ae0872ecfb6bdcfa9c6c76</id>
<content type='text'>
At present linux/bitops.h is included in ACPI code. This is not needed and
can cause a problem in fls64.h since BITS_PER_LONG is not defined. Move
the #include into the part not used by ACPI.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>acpi: Use defines for field lengths</title>
<updated>2020-09-25T03:27:25+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-09-22T18:45:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=2a2ebf880cae6d961b8259b7b767d0aa0d34f070'/>
<id>urn:sha1:2a2ebf880cae6d961b8259b7b767d0aa0d34f070</id>
<content type='text'>
A few fields have an open-coded length. Use the defines for this purpose
instead.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>acpi: tpm: Add a TPM1 table</title>
<updated>2020-09-25T03:27:23+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-09-22T18:45:33+00:00</published>
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<id>urn:sha1:77bb1c69dfca24e4c14fd6876a68a38118142cae</id>
<content type='text'>
This provides information about a v1 TPM in the system. Generate this
table if the TPM is present.

Add a required new bloblist type and correct the header order of one
header file.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>acpi: tpm: Add a TPM2 table</title>
<updated>2020-09-25T03:27:23+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-09-22T18:45:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=9179c3571ce587e96b957d0da8f0e4dcabc8d293'/>
<id>urn:sha1:9179c3571ce587e96b957d0da8f0e4dcabc8d293</id>
<content type='text'>
This provides information about a v2 TPM in the system. Generate this
table if the TPM is present.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: acpi: Add support for additional Intel tables</title>
<updated>2020-09-25T03:27:19+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-09-22T18:45:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=540f0bae9bd0e19d00d11796a62a08f94d895189'/>
<id>urn:sha1:540f0bae9bd0e19d00d11796a62a08f94d895189</id>
<content type='text'>
Apollo Lake needs to generate a few more table types used on Intel SoCs.
Add support for these into the x86 ACPI code.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: acpi: Support generation of the DBG2 table</title>
<updated>2020-09-25T03:27:17+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-09-22T18:45:10+00:00</published>
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<id>urn:sha1:f37979e7b75e1290e9756c3e964a85ef8b10c3c7</id>
<content type='text'>
Add an implementation of the DBG2 (Debug Port Table 2) ACPI table.
Adjust one of the header includes to be in the correct order, before
adding more.

Note that the DBG2 table is generic but the PCI UART is x86-specific at
present since it assumes an ns16550 UART. It can be generalised later
if necessary.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: acpi: Support generation of the HPET table</title>
<updated>2020-09-25T03:27:17+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-09-22T18:45:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=d2628984b7831b26d8f9ac25c966d6151df7a929'/>
<id>urn:sha1:d2628984b7831b26d8f9ac25c966d6151df7a929</id>
<content type='text'>
Add an implementation of the HPET (High Precision Event Timer) ACPI
table. Since this is x86-specific, put it in an x86-specific file

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>common: Drop linux/bitops.h from common header</title>
<updated>2020-05-19T01:19:23+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-05-10T17:40:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=cd93d625fd751d55c729c78b10f82109d56a5f1d'/>
<id>urn:sha1:cd93d625fd751d55c729c78b10f82109d56a5f1d</id>
<content type='text'>
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>acpi: Put table-setup code in its own function</title>
<updated>2020-04-30T09:16:12+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-04-26T15:19:51+00:00</published>
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<id>urn:sha1:7e586f69070db02171dca77f41adbcccd6394b33</id>
<content type='text'>
We always write three basic tables to ACPI at the start. Move this into
its own function, along with acpi_fill_header(), so we can write a test
for this code.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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