StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror) https://git.radix-linux.su/starfive-tech/u-boot.git/atom?h=rtthread_AMP 2022-10-18T08:24:37+00:00 2022-10-18T08:24:37+00:00 yanhong.wang yanhong.wang@starfivetech.com 2022-06-09T02:22:15+00:00 urn:sha1:abd35ca6d33fb5df1f413b5466b315a92fa36f4f Update Kconfig to support reset in SPL for StarFive JH7110 SoC. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com> 2022-10-18T08:24:35+00:00 yanhong.wang yanhong.wang@starfivetech.com 2022-05-10T00:53:44+00:00 urn:sha1:2f5b272861bc842878bd85e6a65ce62d342009e3 Adjust the dependency from TARGET_STARFIVE_VISIONFIVE to STARFIVE_JH7110. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com> 2022-10-18T08:24:33+00:00 yanhong.wang yanhong.wang@starfivetech.com 2022-03-18T10:21:46+00:00 urn:sha1:56c86383dc88850ee2e5af197532939b861f573b Support for reset controller on starfive JH7110 SoCs. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com> 2021-08-06T07:32:03+00:00 Michal Simek michal.simek@xilinx.com 2021-07-30T06:00:10+00:00 urn:sha1:3f123b74242bc076ba6cae6d45a11bd5da1d977f Add firmware based reset controller for Xilinx ZynqMP SoC to let other drivers to call reset functions. Driver is only tested on Xilinx ZynqMP but support for Xilinx Versal can be simply added. That's why reset_id and nr_reset are assigned in probe folder. Driver is inpired by driver from Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com> 2021-05-31T08:35:55+00:00 Green Wan green.wan@sifive.com 2021-05-27T13:52:13+00:00 urn:sha1:70415e1e528db0856fedd4fa79b9f4a303a28c62 Add defconfig and board support for HiFive Unmatched. Signed-off-by: Green Wan <green.wan@sifive.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com> 2021-05-31T08:35:54+00:00 Green Wan green.wan@sifive.com 2021-05-27T13:52:08+00:00 urn:sha1:d56d79ed27c658f32f9a4bcae44e789b9c2879aa Add fu740 support. One abstract layer is added for supporting multiple chips such as fu540 and fu740. Signed-off-by: Green Wan <green.wan@sifive.com> 2021-04-08T07:37:29+00:00 Bin Meng bmeng.cn@gmail.com 2021-03-17T03:10:58+00:00 urn:sha1:ae2d9506a36ce2a31b2865c7071e3d20aa633340 In preparation to add SiFive Unmatched board support, let's rename the existing fu540 board to unleashed. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com> 2021-01-18T20:23:06+00:00 Chia-Wei, Wang chiawei_wang@aspeedtech.com 2020-12-14T05:54:26+00:00 urn:sha1:9fc21086b7fe7aa5ca328bb290c4cd78aeab6eaf Add controller reset support through the System Control Unit (SCU) of AST2600 SoC. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com> 2020-10-22T15:26:14+00:00 Chia-Wei, Wang chiawei_wang@aspeedtech.com 2020-10-15T02:25:14+00:00 urn:sha1:b2424cd2f4337cd36aa635d3bc52485f150d8ae6 1. Rename AST2500 reset driver from ast2500-reset.c to reset-ast2500.c 2. Rename AST2500 reset kconfig option from AST2500_RESET to RESET_AST2500 Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com> 2020-10-22T15:26:14+00:00 Chia-Wei, Wang chiawei_wang@aspeedtech.com 2020-10-15T02:25:13+00:00 urn:sha1:611a28ce271164941aac02feea19f1d87bd1cf32 The System Control Unit (SCU) controller of Aspeed SoCs provides the reset control for each peripheral. This patch refactors the reset method to leverage the SCU reset control. Thus the driver dependency on watchdog including dedicated WDT API and reset flag encoding can be eliminated. The Kconfig description is also updated accordingly. Signed-off-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Reviewed-by: Ryan Chen <ryan_chen@aspeedtech.com>