starfive-tech/u-boot.git/drivers/net/phy/realtek.c, branch rtthread_AMP

net: phy: realtek: Introduce PHY_RTL8201F_S700_RMII_TIMINGS to adjust rx/tx timings

2020-07-07T20:09:22+00:00

RTL8201F PHY module found on Actions Semi Cubieboard7 seems to have specific Rx/Tx interface timings requirement for proper PHY operations. These timing values are not documented anywhere and picked from vendor code. This commits lets proper packets to be transmitted over the network. Signed-off-by: Amit Singh Tomar

net: phy: realtek: Add support for RTL8201F PHY module.

2020-07-07T20:09:22+00:00

This patch adds support for Realtek PHY RTL8201F 10/100Mbs (with variants: RTL8201FN and RTL8201FL) PHYceiver. It is present on Actions Semi Cubieboard7 board. Signed-off-by: Amit Singh Tomar

common: Drop linux/delay.h from common header

2020-05-19T01:19:23+00:00

Move this uncommon header out of the common header. Signed-off-by: Simon Glass

net: phy: realtek: add rx delay support for RTL8211F

2020-05-10T11:25:02+00:00

Add RX delay enable support for RTL8211F PHY. Reviewed-by: Ye Li Signed-off-by: Fugang Duan Signed-off-by: Peng Fan

net: phy: realtek: Introduce quirk to mark RXC not stoppable

2019-05-07T19:51:55+00:00

When EEE is supported by the PHY and the driver allows it, libphy in the kernel is configuring the PHY to stop receiving the xMII clock while it is signaling LPI. While this (usually) works fine in the kernel this is causing issues in U-Boot when rebooting from the linux kernel with this bit set (without having the possibility to reset the PHY) where the PHY suddenly stops working. A new quirk is introduced to unconditionally reset this bit. If the quirk is not enabled using the proper configuration symbol, the PHY state is not changed. Signed-off-by: Carlo Caione Acked-by: Joe Hershberger

net: phy: realtek: Add functions to read PHY's extended registers

2019-01-24T17:35:29+00:00

According to the datasheet to access the extended registers we have to: 1. Write Register 31 Data = 0x0XYZ (Page 0xXYZ) 2. Read/Write the target Register Data 3. Write Register 31 Data = 0x0000 or 0xa42 (switch back to IEEE Standard Registers) Hook the missing functions so that we can use the `mdio rx/wx` command to easily access the extended registers. Signed-off-by: Carlo Caione Acked-by: Joe Hershberger

net: phy: Clean up includes of common.h

2018-07-26T19:08:22+00:00

We want to be able to include some other system headers in phy.h but that requires us to have included common.h in the top-level first. Also, common.h includes config.h as the first thing it does, so don't include it directly. Series-to: u-boot Series-cc: Grygorii Strashko Seried-cc: ti Series-process-log: sort, uniq Cover-letter: Prepare for net: phy: prevent uclass_eth device "node" field overwriting Prepare for [1] so that it doesn't break the build for a bunch of boards. There are a number of reasons this series broke the build but none of them depend on changes in the series, so fix up those situations ahead of applying that series. [1] https://patchwork.ozlabs.org/cover/940104/ END Signed-off-by: Joe Hershberger

SPDX: Convert all of our single license tags to Linux Kernel style

2018-05-07T13:34:12+00:00

When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini

net: phy: Add PHY_RTL8211E_PINE64_GIGABIT_FIX for realtek phys

2018-03-22T20:05:27+00:00

Setting PHY_RTL8211E_PINE64_GIGABIT_FIX forces internal rx/tx delays off on the PHY, as well as flipping some magical undocumented bits. The magic number comes from the Pine64 engineering team, presumably as a proxy from Realtek. This configuration fixes the throughput on some Pine64 models. Packet loss of up to 60-70% has been observed without this. Signed-off-by: Kyle Evans Acked-by: Joe Hershberger

net: phy: realtek: fix enabling of the TX-delay for RTL8211F

2017-09-07T18:23:52+00:00

The old logic always enabled the TX-delay when the phy-mode was set to PHY_INTERFACE_MODE_RGMII. With this patch we enable the TX delay for PHY_INTERFACE_MODE_RGMII_ID and PHY_INTERFACE_MODE_RGMII_TXID and disable it for PHY_INTERFACE_MODE_RGMII. Based on a similar change made in the Linux Realtek PHY driver by Martin Blumenstingl . Signed-off-by: Madalin Bucur Acked-by: Joe Hershberger Acked-by: York Sun