starfive-tech/u-boot.git/drivers/net/mvpp2.c, branch master

net: mvpp2: add explicit sgmii-2500 support

2021-05-20T11:03:35+00:00

Until now the mvpp2 driver used an extra 'phy-speed' DT property in order to differentiate between the SGMII and SGMII @2.5GHz. As there is a dedicated PHY_INTERFACE_MODE_SGMII_2500 flag to mark the latter start using it and drop the custom flag. Signed-off-by: Marcin Wojtas Reviewed-by: Stefan Chulski Reviewed-by: Nadav Haklai Tested-by: Nadav Haklai Signed-off-by: Stefan Roese Reviewed-by: Ramon Fried

net: mvpp2: allow MDIO registration for fixed links

2021-05-20T11:03:31+00:00

Currently, there are 2 valid cases for interface, PHY and mdio relation: - If an interface has PHY handler, it'll call mdio_mii_bus_get_from_phy(), which will register MDIO bus. - If we want to use fixed-link for an interface, PHY handle is not defined in the DTS, and no MDIO is registered. There is a third case, for some boards (with switch), the MDIO is used for switch configuration, but the interface itself uses fixed link. This patch allows this option by checking if fixed-link subnode is defined, in this case, MDIO bus is registers, but the PHY address is set to PHY_MAX_ADDR for this interface, so this interface will not try to access the PHY later on. Signed-off-by: Stefan Chulski Signed-off-by: Stefan Roese

net: mvpp2: fix missing switch case break

2021-05-20T11:03:30+00:00

Signed-off-by: Ben Peled Reviewed-by: Stefan Chulski Reviewed-by: Kostya Porotchkin Signed-off-by: Stefan Roese Reviewed-by: Ramon Fried

net: mvpp2: remove unused define MVPP22_SMI_PHY_ADDR_REG

2021-05-20T11:03:30+00:00

Signed-off-by: Ben Peled Reviewed-by: Stefan Chulski Reviewed-by: Kostya Porotchkin Signed-off-by: Stefan Roese Reviewed-by: Ramon Fried

net: mvpp2: AN Bypass in 1000 and 2500 basex mode

2021-05-20T11:03:30+00:00

Signed-off-by: Ben Peled Reviewed-by: Stefan Chulski Reviewed-by: Kostya Porotchkin Signed-off-by: Stefan Roese

net: mvpp2: Fix 2.5G GMII_SPEED configurations

2021-05-20T11:03:30+00:00

GMII_SPEED should be enabled for 2.5G speed Signed-off-by: Stefan Chulski Reviewed-by: Yan Markman Reviewed-by: Kostya Porotchkin Signed-off-by: Stefan Roese

net: mvpp2: remove redundant SMI address configuration

2021-05-20T11:03:30+00:00

Because the mvpp2 driver now relies on the PHYLIB and the external MDIO driver, configuring low level SMI bus settings is redundant. Signed-off-by: Marcin Wojtas Reviewed-by: Kostya Porotchkin Reviewed-by: Stefan Chulski Signed-off-by: Stefan Roese Reviewed-by: Ramon Fried

net: mvpp2: add 1000BaseX and 2500BaseX ppv2 support

2021-05-20T11:03:30+00:00

Signed-off-by: Stefan Chulski Signed-off-by: Stefan Roese Reviewed-by: Ramon Fried

net: mvpp2: add CP115 port1 10G/5G SFI support

2021-05-20T11:03:30+00:00

1. Differ between Port1 RGMII and SFI modes in Netcomplex config. 2. Remove XPCS config from SFI mode. Port1 doesn't XPCS domain, XPCS config should be removed. Access to Port1 XPCS can cause stall. 3. Add Port1 MPCS configurations. Signed-off-by: Stefan Chulski Signed-off-by: Stefan Roese

common: Drop asm/global_data.h from common header

2021-02-02T20:33:42+00:00

Move this out of the common header and include it only where needed. In a number of cases this requires adding "struct udevice;" to avoid adding another large header or in other cases replacing / adding missing header files that had been pulled in, very indirectly. Finally, we have a few cases where we did not need to include at all, so remove that include. Signed-off-by: Simon Glass Signed-off-by: Tom Rini