starfive-tech/u-boot.git/arch/x86, branch rtthread_AMP

x86: tangier: acpi: Add GPIO card detection to SDHCI #2

2021-09-22T13:50:35+00:00

On Intel Tangier the SDHCI #2 provides SD card connection. Add GPIO card detection for it. Fixes: 39665beed6f7 ("x86: tangier: Enable ACPI support for Intel Tangier") BugLink: https://github.com/edison-fw/meta-intel-edison/issues/135 Signed-off-by: Andy Shevchenko Acked-by: Bin Meng

x86: edison: Mark eMMC non-removable

2021-09-22T13:50:35+00:00

eMMC is non-removable on Intel Edison board. Fix the DTS accordingly. Signed-off-by: Andy Shevchenko Reviewed-by: Bin Meng

efi_loader rename enum efi_mem_type to efi_memory_type

2021-08-17T15:24:08+00:00

Use the same name as in the UEFI specification to avoid confusion. Signed-off-by: Heinrich Schuchardt

Merge https://source.denx.de/u-boot/custodians/u-boot-x86

2021-08-03T01:35:50+00:00

- Fixed broken ICH SPI driver in software sequencer mode - Added "m25p,fast-read" to SPI flash node for x86 boards - Drop ROM_NEEDS_BLOBS and BUILD_ROM for x86 ROM builds - Define a default TSC timer frequency for all x86 boards - x86 MTRR MSR programming codes bug fixes - x86 "hob" command bug fixes - Don't program MTRR for DRAM for FSP1 - Move INIT_PHASE_END_FIRMWARE to FSP2 - Use external graphics card by default on Intel Crown Bay - tangier: Fix DMA controller IRQ polarity in CSRT

global: Convert simple_strtoul() with hex to hextoul()

2021-08-02T17:32:14+00:00

It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass

x86: queensbay: Return directly if IGD / SDVO were already disabled

2021-08-02T16:03:14+00:00

Initialize 'igd' and 'sdvo' to NULL so that we just need to test them against NULL later, to be compatible with that case that IGD and SDVO devices were already in disabled state. Signed-off-by: Bin Meng Reviewed-by: Simon Glass

x86: fsp: Only FSP2 has INIT_PHASE_END_FIRMWARE

2021-08-02T16:01:38+00:00

For FSP1, there is no such INIT_PHASE_END_FIRMWARE. Move board_final_cleanup() to fsp2 directory. Fixes: 7c73cea44290 ("x86: Notify the FSP of the 'end firmware' event") Signed-off-by: Bin Meng Reviewed-by: Simon Glass Tested on chromebook_coral, chromebook_samus, chromebook_link, minnowmax Tested-by: Simon Glass

x86: fsp: Don't program MTRR for DRAM for FSP1

2021-08-02T16:01:29+00:00

There are several outstanding issues as to why this does not apply to FSP1: * For FSP1, the system memory and reserved memory used by FSP are already programmed in the MTRR by FSP. * The 'mtrr_top' mistakenly includes TSEG memory range that has the same RES_MEM_RESERVED resource type. Its address is programmed and reported by FSP to be near the top of 4 GiB space, which is not what we want for SDRAM. * The call to mtrr_add_request() is not guaranteed to have its size to be exactly the power of 2. This causes reserved bits of the IA32_MTRR_PHYSMASK register to be written which generates #GP. For FSP2, it seems this is necessary as without this, U-Boot boot process on Chromebook Coral goes very slowly. Signed-off-by: Bin Meng Reviewed-by: Simon Glass Tested on chromebook_coral, chromebook_samus, chromebook_link, minnowmax Tested-by: Simon Glass

x86: mtrr: Abort if requested size is not power of 2

2021-08-02T07:11:41+00:00

The size parameter of mtrr_add_request() and mtrr_set_next_var() shall be power of 2, otherwise the logic creates a mask that does not meet the requirement of IA32_MTRR_PHYSMASK register. Programming such a mask value to IA32_MTRR_PHYSMASK generates #GP. Signed-off-by: Bin Meng Reviewed-by: Simon Glass Tested on chromebook_coral, chromebook_samus, chromebook_link, minnowmax Tested-by: Simon Glass

x86: mtrr: Skip MSRs that were already programmed in mtrr_commit()

2021-08-02T07:11:40+00:00

At present mtrr_commit() programs the MTRR MSRs starting from index 0, which may overwrite MSRs that were already programmed by previous boot stage or FSP. Switch to call mtrr_set_next_var() instead. Signed-off-by: Bin Meng Reviewed-by: Simon Glass Tested on chromebook_coral, chromebook_samus, chromebook_link, minnowmax Tested-by: Simon Glass