<feed xmlns='http://www.w3.org/2005/Atom'>
<title>starfive-tech/u-boot.git/arch/x86/lib/physmem.c, branch rtthread_AMP</title>
<subtitle>StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)</subtitle>
<id>https://git.radix-linux.su/starfive-tech/u-boot.git/atom?h=rtthread_AMP</id>
<link rel='self' href='https://git.radix-linux.su/starfive-tech/u-boot.git/atom?h=rtthread_AMP'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/'/>
<updated>2021-02-02T20:33:42+00:00</updated>
<entry>
<title>common: Drop asm/global_data.h from common header</title>
<updated>2021-02-02T20:33:42+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-10-31T03:38:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=401d1c4f5d2d29c4bc4beaec95402ca23eb63295'/>
<id>urn:sha1:401d1c4f5d2d29c4bc4beaec95402ca23eb63295</id>
<content type='text'>
Move this out of the common header and include it only where needed.  In
a number of cases this requires adding "struct udevice;" to avoid adding
another large header or in other cases replacing / adding missing header
files that had been pulled in, very indirectly.   Finally, we have a few
cases where we did not need to include &lt;asm/global_data.h&gt; at all, so
remove that include.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>common: Drop log.h from common header</title>
<updated>2020-05-19T01:19:18+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-05-10T17:40:05+00:00</published>
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<id>urn:sha1:f7ae49fc4f363a803dab3be078e93ead8e75a8e9</id>
<content type='text'>
Move this header out of the common header.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Move paging functions into cpu.c</title>
<updated>2014-10-29T02:42:51+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-10-10T14:21:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=7bddac947da91431655c9d7be030b94c1c9a8699'/>
<id>urn:sha1:7bddac947da91431655c9d7be030b94c1c9a8699</id>
<content type='text'>
These functions really don't belong in physmem as they relate to the
cpu. Move them.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>cosmetic: replace MIN, MAX with min, max</title>
<updated>2014-09-24T22:30:29+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2014-09-18T04:28:06+00:00</published>
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<id>urn:sha1:c79cba37b3b42cf8fbd71babcd8998867f76fead</id>
<content type='text'>
The macro MIN, MAX is defined as the aliase of min, max,
respectively.

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>x86: Declare global_data pointer when it is used</title>
<updated>2013-05-13T20:33:20+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-04-17T16:13:33+00:00</published>
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<id>urn:sha1:7282d834cd47cabc481a5cbe6e686ef40751436f</id>
<content type='text'>
Several files use the global_data pointer without declaring it. This works
because the declaration is currently a NOP. But still it is better to
fix this so that x86 lines up with other archs.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>x86: Implement arch_phys_memset so that it can wipe memory above 4GB</title>
<updated>2012-12-06T22:30:41+00:00</updated>
<author>
<name>Gabe Black</name>
<email>gabeblack@chromium.org</email>
</author>
<published>2012-10-23T18:04:46+00:00</published>
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<id>urn:sha1:ac31a7b81c5519a86ddce4fde4a99ba759332abc</id>
<content type='text'>
Implement arch_phys_memset so that it can set memory at physical addresses
above 4GB using PAE paging. Because there are only 5 page tables in PAE mode,
1 PDPT and 4 PDTs, those tables are statically allocated in the BSS. The
tables must be 4K page aligned and are declared that way, and because U-Boot
starts as 4K aligned and the relocation code relocates it to a 4K aligned
address, the tables work as intended.

While paging is turned on, all 4GB are identity mapped except for one 2MB
page which is used as the window into high memory. This way, U-Boot will
continue to work as expected when running code that expects to access memory
freely, but the code can still get at high memory through its window.

The window is put at 2MB so that it's 2MB page aligned, low in memory to be
out of the way of things U-Boot is likely to care about, and above the lowest
1MB where lots of random things live.

Signed-off-by: Gabe Black &lt;gabeblack@chromium.org&gt;

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
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