starfive-tech/u-boot.git/arch/x86/cpu, branch rtthread_AMP

x86: queensbay: Return directly if IGD / SDVO were already disabled

2021-08-02T16:03:14+00:00

Initialize 'igd' and 'sdvo' to NULL so that we just need to test them against NULL later, to be compatible with that case that IGD and SDVO devices were already in disabled state. Signed-off-by: Bin Meng Reviewed-by: Simon Glass

x86: mtrr: Abort if requested size is not power of 2

2021-08-02T07:11:41+00:00

The size parameter of mtrr_add_request() and mtrr_set_next_var() shall be power of 2, otherwise the logic creates a mask that does not meet the requirement of IA32_MTRR_PHYSMASK register. Programming such a mask value to IA32_MTRR_PHYSMASK generates #GP. Signed-off-by: Bin Meng Reviewed-by: Simon Glass Tested on chromebook_coral, chromebook_samus, chromebook_link, minnowmax Tested-by: Simon Glass

x86: mtrr: Skip MSRs that were already programmed in mtrr_commit()

2021-08-02T07:11:40+00:00

At present mtrr_commit() programs the MTRR MSRs starting from index 0, which may overwrite MSRs that were already programmed by previous boot stage or FSP. Switch to call mtrr_set_next_var() instead. Signed-off-by: Bin Meng Reviewed-by: Simon Glass Tested on chromebook_coral, chromebook_samus, chromebook_link, minnowmax Tested-by: Simon Glass

x86: mtrr: Do not clear the unused ones in mtrr_commit()

2021-08-02T07:11:40+00:00

Current mtrr_commit() logic assumes that MTRR MSRs are programmed consecutively from index 0 to its maximum number, and whenever it detects an unused one, it clears all other MTRRs starting from that one. However this may not always be the case. In fact, the clear is not much helpful because these MTRRs come out of reset as disabled already. Drop the clear codes. Signed-off-by: Bin Meng Reviewed-by: Simon Glass Tested on chromebook_coral, chromebook_samus, chromebook_link, minnowmax Tested-by: Simon Glass

x86: tsc: Rename X86_TSC_TIMER_EARLY_FREQ to X86_TSC_TIMER_FREQ

2021-08-02T07:11:40+00:00

Currently there are two places to specify the x86 TSC timer frequency with one in Kconfig used for early timer and the other one in device tree used when the frequency cannot be determined from hardware. This may potentially create an inconsistent config where the 2 values do not match. Let's use the one specified in Kconfig in the device tree as well. Signed-off-by: Bin Meng Reviewed-by: Simon Glass

x86: kconfig: Drop ROM_NEEDS_BLOBS and BUILD_ROM

2021-08-02T07:11:40+00:00

These 2 options are no longer needed as now binman is used to build u-boot.rom. Signed-off-by: Bin Meng Reviewed-by: Simon Glass

x86: tangier: Fix DMA controller IRQ polarity in CSRT

2021-08-02T07:11:40+00:00

IRQ polarity in CSRT has the same definition as by ACPI specification chapter 19.6.64 "Interrupt (Interrupt Resource Descriptor Macro)", i.e. ActiveHigh is 0, and ActiveLow is 1. On Intel Tangier the DMA controller IRQ polarity is ActiveHigh. Note, in DSDT (see southcluster.asl) it's described correctly. Fixes: 5e99fde34a77 ("x86: tangier: Populate CSRT for shared DMA controller") Signed-off-by: Andy Shevchenko Reviewed-by: Bin Meng Reviewed-by: Simon Glass

x86: coreboot: Use vendor in the Kconfig

2021-07-15T11:50:21+00:00

Use VENDOR_COREBOOT instead of TARGET_COREBOOT so we can have multiple coreboot boards, sharing options. Only SYS_CONFIG_NAME needs to be defined TARGET_COREBOOT. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

x86: Don't set up MTRRs if previously done

2021-07-15T11:50:00+00:00

When starting U-Boot from a previous-stage bootloader we presumably don't need to set up the variable MTRRs. In fact this could be harmful if the existing settings are not what U-Boot uses. Skip that step in this case. Signed-off-by: Simon Glass Reviewed-by: Bin Meng

bootstage: Eliminate when not enabled

2021-07-07T14:17:54+00:00

When we do not have bootstage enabled, rather than include an empty dummy function, we just don't reference it. This saves us space in some tight builds. This also shows a few cases where show_boot_progress was incorrectly guarded before. Cc: Simon Glass Signed-off-by: Tom Rini