<feed xmlns='http://www.w3.org/2005/Atom'>
<title>starfive-tech/u-boot.git/arch/mips/Kconfig, branch rtthread_AMP</title>
<subtitle>StarFive Tech U-Boot for VisionFive (JH7110) boards (mirror)</subtitle>
<id>https://git.radix-linux.su/starfive-tech/u-boot.git/atom?h=rtthread_AMP</id>
<link rel='self' href='https://git.radix-linux.su/starfive-tech/u-boot.git/atom?h=rtthread_AMP'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/'/>
<updated>2021-09-13T22:23:13+00:00</updated>
<entry>
<title>pci: Drop DM_PCI</title>
<updated>2021-09-13T22:23:13+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2021-08-02T00:54:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=3232bdf0b30b057ace64f192bc55a0bed4199770'/>
<id>urn:sha1:3232bdf0b30b057ace64f192bc55a0bed4199770</id>
<content type='text'>
This option has not effect now. Drop it, using PCI instead where needed.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>MIPS: malta: enable PCI driver model</title>
<updated>2021-07-18T18:37:39+00:00</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2021-07-15T18:54:01+00:00</published>
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<id>urn:sha1:526ceb43878bfcaaeffbb988e363e89500695bee</id>
<content type='text'>
Enable DM_PCI and DM_ETH on MIPS Malta.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>MIPS: remove deprecated qemu_mips board</title>
<updated>2021-05-25T13:35:06+00:00</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2021-04-21T19:13:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=5308a71db80ede9f0e0b5c727ae26469ab7914c8'/>
<id>urn:sha1:5308a71db80ede9f0e0b5c727ae26469ab7914c8</id>
<content type='text'>
Remove qemu_mips boards because DM migration doesn't make sense.
The board support for qemu_mips is already marked as deprecated
in Qemu in favour of the Malta board. Also qemu_mips support
has been removed from Linux a long time ago.

The official replacement is the Malta board. The same Malta U-Boot
image can be used with Qemu and on physical hardware.
All combinations of Big Endian and Little Endian as well as 32 bit
and 64 bit are supported.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>mips: mtmips: select SYSRESET for mt7628 only</title>
<updated>2021-01-24T20:39:26+00:00</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2020-11-12T08:35:28+00:00</published>
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<id>urn:sha1:7fcc740ffefbf41c71147313ef6993368fd8ae84</id>
<content type='text'>
Currently only mt7628 needs the sysreset driver, do not select it for
mt7620.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
<entry>
<title>mips: octeon: Update Octeon Kconfig</title>
<updated>2020-08-03T19:14:48+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2020-07-30T11:56:21+00:00</published>
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<id>urn:sha1:1015540d70d2647c3a99303ad971a1533ea94f15</id>
<content type='text'>
This patch selects DM_SPI &amp; DM_I2C for MIPS Octeon. DM_GPIO, DM_SERIAL
and DM_ETH are already selected.

Additionally the selections are now alphabetically sorted.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>mips: octeon: use mips_mach_early_init() to copy to L2 cache</title>
<updated>2020-07-18T13:47:50+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2020-06-30T10:33:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=e9609dc38ba225ddb58fcef41a0beb8a3b09a888'/>
<id>urn:sha1:e9609dc38ba225ddb58fcef41a0beb8a3b09a888</id>
<content type='text'>
This patch adds the code to copy itself from bootrom location to a
different location (TEXT_BASE) to the Octeon platform. Its used in
this case to copy the complete U-Boot image into L2 cache, which
greatly improves the bootup time - especially in regard to the
very long and complex DDR4 init code.

The Kconfig symbol CONFIG_MIPS_MACH_EARLY_INIT is enabled with this
patch for Octeon.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>mips: octeon: Initial minimal support for the Marvell Octeon SoC</title>
<updated>2020-07-18T13:47:50+00:00</updated>
<author>
<name>Aaron Williams</name>
<email>awilliams@marvell.com</email>
</author>
<published>2020-06-30T10:08:56+00:00</published>
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<id>urn:sha1:0dc4ab9c43ff6a235b4c0c5295a1a9747ea684c9</id>
<content type='text'>
This patch adds very basic support for the Octeon III SoCs. Only
CFI parallel NOR flash and UART is supported for now.

Please note that the basic Octeon port does not include the DDR3/4
initialization yet. This will be added in some follow-up patches
later. To still use U-Boot on with this port, the L2 cache (4MiB on
Octeon III CN73xx) is used as RAM. This way, U-Boot can boot to the
prompt on such boards.

Signed-off-by: Aaron Williams &lt;awilliams@marvell.com&gt;
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>mips: Add CONFIG_MIPS_MACH_EARLY_INIT for very early mach init code</title>
<updated>2020-07-18T12:23:25+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2020-06-30T10:33:16+00:00</published>
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<id>urn:sha1:de34a61642eda0b64b34dd4d9eeda57eb01f76bc</id>
<content type='text'>
This patch adds the optional call to mips_mach_early_init() to start.S
at a very early stage. Its disabled per default. It can be used for
very early machine / platform specific init code.  Its called very
early and at this stage the PC is allowed to differ from the linking
address (CONFIG_TEXT_BASE) as no absolute jump has been performed until
this call.

It will be used by thje Octeon platform.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>mips: add config options for generic cache setup code</title>
<updated>2020-07-18T12:23:25+00:00</updated>
<author>
<name>Daniel Schwierzeck</name>
<email>daniel.schwierzeck@gmail.com</email>
</author>
<published>2020-07-11T22:45:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=57bfb1aed6a87b19ca7e2a76df83ea387621e2e9'/>
<id>urn:sha1:57bfb1aed6a87b19ca7e2a76df83ea387621e2e9</id>
<content type='text'>
Add an own Kconfig symbol for the initial disabling of caches
invoked from generic start code.

Also add an own Kconfig symbols for the initialization of caches
invoked from generic start code.

Until now both code paths could only be disabled with
CONFIG_SKIP_LOWLEVEL_INIT. But this is not flexible enough for
RAM boot scenarios like EJTAG or SPL payload or for machines
which don't require cache initialization or which want to
provide their own cache implementation.

Signed-off-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Tested-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>mips: mtmips: add SPL support</title>
<updated>2020-04-27T18:30:12+00:00</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2020-04-21T07:28:47+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/starfive-tech/u-boot.git/commit/?id=7a4b6964b54d5067181db803f68c7472a9d07efa'/>
<id>urn:sha1:7a4b6964b54d5067181db803f68c7472a9d07efa</id>
<content type='text'>
This patch adds SPL support for mtmips platform. The lowlevel architecture
is split into SPL and the rest parts are built into a memory loadable
u-boot image. Optional SPL_DM and OF_CONTROL are also supported.

The increment of size is very small (&lt; 10 KiB) if SPL_DM and OF_CONTROL are
not enabled and the memory bootable u-boot (u-boot.img) is generated
automatically so there is not need to add a separate config for it.

A lzma compressed payload (u-boot-lzma.img) is also generated and it will
be combined with u-boot-spl.bin to form the unified ROM bootable binary
u-boot-mtmips.bin.

A spl loader is added to support uncompress the payload.

Reviewed-by: Stefan Roese &lt;sr@denx.de&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
</content>
</entry>
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