starfive-tech/u-boot.git/arch/arm/include/asm/system.h, branch rtthread_AMP

armv8: Initialize CNTFRQ if at highest exception level

2021-07-23T22:53:46+00:00

CNTFRQ_EL0 is only writable from the highest supported exception level on the platform. For Armv8-A, this is typically EL3, but technically EL2 and EL3 are optional so it may need to be initialized at EL2 or EL1. For Armv8-R, the highest exception level is always EL2. This patch moves the initialization outside of the switch_el block and uses a new macro branch_if_not_highest_el which dynamically detects whether it is at the highest supported exception level. Linux's docs state that CNTFRQ_EL0 should be initialized by the bootloader. If not set, the the U-Boot prompt countdown hangs. Signed-off-by: Peter Hoyes

arm: remove set_dacr/get_dacr functions

2021-03-02T20:53:37+00:00

Remove the unused function set_dacr/get_dacr Serie-cc: Ard Biesheuvel Serie-cc: R Sricharan Signed-off-by: Patrick Delaunay

arm: cosmetic: align TTB_SECT define value

2021-03-02T20:53:37+00:00

Align TTB_SECT define value with previous value. Signed-off-by: Patrick Delaunay

arm: remove TTB_SECT_XN_MASK in DCACHE_WRITETHROUGH

2021-03-02T20:53:37+00:00

The normal memory (other that DCACHE_OFF) should be executable by default, only the device memory (DCACHE_OFF) used for peripheral access should have the bit execute never (TTB_SECT_XN_MASK). Signed-off-by: Patrick Delaunay

common: board_r: Drop initr_noncached wrapper

2021-01-15T19:36:12+00:00

Add a return value to noncached_init and use it directly in the post-relocation init sequence, rather than using a wrapper stub. Signed-off-by: Ovidiu Panait Reviewed-by: Simon Glass

arm: enable allocate-on-read for LPAE's DCACHE_WRITEBACK/_WRITETHROUGH

2020-07-29T12:43:40+00:00

The LPAE versions of DCACHE_WRITEBACK and DCACHE_WRITETHROUGH are currently defined as no-allocate for both reads and writes, which deviates from the non-LPAE definition, and mostly defeats the purpose of enabling the caches in the first place. So align LPAE with !LPAE, and enable allocate-on-read for both. And while at it, add some clarification about the meaning of the chosen values. Signed-off-by: Ard Biesheuvel Reviewed-by: Andre Przywara

arm: provide a function for boards init code to modify MMU virtual-physical map

2020-07-10T18:10:43+00:00

Provide function for setting arbitrary virtual-physical MMU mapping and cache settings for the given region. Signed-off-by: Marek Szyprowski Reviewed-by: Tom Rini

arm: update comments to the common style

2020-07-10T18:10:43+00:00

Update the comments in include/asm/system.h to the common style. Signed-off-by: Marek Szyprowski Reviewed-by: Tom Rini

arm: use correct argument size of special registers

2020-07-07T22:23:48+00:00

Compiling with clang on ARMv8 shows errors like: ./arch/arm/include/asm/system.h:162:32: note: use constraint modifier "w" asm volatile("msr sctlr_el1, %0" : : "r" (val) : "cc"); ^~ %w0 These errors are due to using an incorrect size for the variables used for writing to and reading from special registers which have 64 bits on ARMv8. Mask off reserved bits when reading the exception level. Signed-off-by: Heinrich Schuchardt

ARM: add psci_arch_init() declaration for CONFIG_ARMV7_PSCI

2020-06-02T21:27:04+00:00

arch/arm/include/asm/system.h declares psci_arch_init(), but it is surrounded by #ifdef CONFIG_ARMV8_PSCI. psci_arch_init() is called for CONFIG_ARMV7_PSCI too. Add the missing function declaration. Signed-off-by: Masahiro Yamada